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path: root/drivers/gpu/drm/i915/intel_ringbuffer.c
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* drm/i915: Stop automatically retiring requests after a GPU hangChris Wilson2016-05-231-0/+2
* drm/i915: Unify intel_ring_begin()Chris Wilson2016-05-231-112/+76
* drm/i915: Fix gen8 semaphores id for legacy modeChris Wilson2016-05-231-2/+7
* drm/i915: Protect gen7 irq_seqno_barrier with uncore lockChris Wilson2016-05-231-1/+7
* drm/i915: check for ERR_PTR from i915_gem_object_pin_map()Dave Gordon2016-04-201-6/+9
* drm/i915: Remove a couple pointless WARN_ONsTvrtko Ursulin2016-04-201-6/+1
* drm/i915/gen9: implement WaEnableSamplerGPGPUPreemptionSupportTim Gore2016-04-201-3/+4
* drm/i915: Force ringbuffers to not be at offset 0Chris Wilson2016-04-141-2/+5
* drm/i915: Prevent leaking of -EIO from i915_wait_request()Chris Wilson2016-04-141-2/+1
* drm/i915: Store the reset counter when constructing a requestChris Wilson2016-04-141-6/+0
* drm/i915: Hide the atomic_read(reset_counter) behind a helperChris Wilson2016-04-141-3/+4
* drm/i915/skl: Fix spurious gpu hang with gt3/gt4 revsMika Kuoppala2016-04-131-2/+3
* drm/i915: Refactor duplicate object vmap functionsChris Wilson2016-04-111-24/+2
* drm/i915: Consolidate common error handling in intel_pin_and_map_ringbuffer_objChris Wilson2016-04-111-13/+12
* drm/i915: Separate out the seqno-barrier from engine->get_seqnoChris Wilson2016-04-091-16/+18
* drm/i915: Remove forcewake dance from seqno/irq barrier on legacy gen6+Chris Wilson2016-04-091-2/+11
* drm/i915: Fixup the free space logic in ring_prepareAkash Goel2016-04-091-3/+3
* drm/i915: Reset engine->last_submitted_seqnoChris Wilson2016-04-081-0/+1
* drm/i915: Reset semaphore page for gen8Chris Wilson2016-04-081-0/+8
* drm/i915: Move the hw semaphore initialisation from GEM to the engineChris Wilson2016-04-081-0/+11
* drm/i915: Remove unneeded drm_device pointer from intel_ring_init_seqno()Chris Wilson2016-04-081-4/+3
* drm/i915: Refer to GGTT {,VM} consistentlyJoonas Lahtinen2016-03-311-1/+2
* drm/i915: introduce for_each_engine_id()Dave Gordon2016-03-241-9/+12
* drm/i915/tdr: Initialize hangcheck struct for each engineTomas Elf2016-03-221-1/+6
* drm/i915: Rename dev_priv->gtt to dev_priv->ggttJoonas Lahtinen2016-03-181-1/+1
* drm/i915/gen9: add WaClearFlowControlGpgpuContextSaveTim Gore2016-03-181-0/+2
* drm/i915: Use shorter route to dev_private where possibleTvrtko Ursulin2016-03-181-1/+1
* drm/i915: More renaming of rings to enginesTvrtko Ursulin2016-03-161-8/+8
* drm/i915: More intel_engine_cs renamingTvrtko Ursulin2016-03-161-6/+6
* drm/i915: Rename intel_engine_cs struct membersTvrtko Ursulin2016-03-161-37/+37
* drm/i915: Rename intel_engine_cs function parametersTvrtko Ursulin2016-03-161-306/+312
* drm/i915: Rename local struct intel_engine_cs variablesTvrtko Ursulin2016-03-161-388/+397
* drm/i915: Don't ERROR for an expected intel_rcs_ctx_init() interruptionChris Wilson2016-02-151-2/+2
* drm/i915: check that rpm ref is held when accessing ringbuf in stolen memDaniele Ceraolo Spurio2016-02-111-0/+3
* drm/i915/gen9: Add WaOCLCoherentLineFlushArun Siluvery2016-01-251-0/+4
* drm/i915/skl: Enable Per context Preemption granularity controlArun Siluvery2016-01-251-0/+10
* drm/i915/skl: Add GEN8_L3SQCREG4 to HW whitelistArun Siluvery2016-01-251-0/+5
* drm/i915/bxt: Add GEN8_L3SQCREG4 to HW whitelistArun Siluvery2016-01-251-0/+5
* drm/i915/bxt: Add GEN9_CS_DEBUG_MODE1 to HW whitelistArun Siluvery2016-01-251-0/+9
* drm/i915/gen9: Add HDC_CHICKEN1 to HW whitelistArun Siluvery2016-01-251-0/+5
* drm/i915/gen9: Add GEN8_CS_CHICKEN1 to HW whitelistArun Siluvery2016-01-251-0/+6
* drm/i915/gen9: Add framework to whitelist specific GPU registersArun Siluvery2016-01-251-0/+17
* drm/i915: Seal busy-ioctl uABI and prevent leaking of internal idsChris Wilson2016-01-211-0/+5
* drm/i915: Cache ringbuffer GTT VMATvrtko Ursulin2016-01-181-0/+3
* drm/i915: Make sure DC writes are coherent on flush.Francisco Jerez2016-01-151-0/+2
* drm/i915: Use MI_BATCH_BUFFER_START on 830/845Ville Syrjälä2016-01-121-4/+2
* drm/i915: Cleanup phys status page tooVille Syrjälä2016-01-121-4/+20
* drm/i915/skl: Default to noncoherent access up to F0Mika Kuoppala2015-12-181-5/+5
* drm/i915: intel_ring_initialized() must be simple and inlineDave Gordon2015-12-101-26/+13
* i915: Replace "hweight8(dev_priv->info.subslice_7eu[i]) != 1" with "!is_power...Zeng Zhaoxiu2015-12-071-1/+2
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