summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/i915/intel_pm.c
Commit message (Expand)AuthorAgeFilesLines
* drm/i915: Don't spam dmesg with rps messages on vlv/chvVille Syrjälä2014-09-291-6/+7
* Revert "drm/i915/bdw: BDW Software Turbo"Daniel Vetter2014-09-291-191/+39
* drm/i915: Limit the watermark to at least 8 entries on gen2/3Ville Syrjälä2014-09-191-0/+11
* drm/i915: Reset power sequencer pipe tracking when disp2d is offVille Syrjälä2014-09-041-0/+2
* drm/i915: Rename global latency_ns variableChris Wilson2014-09-031-18/+18
* drm/i915: Disable trickle feed for gen2/3Ville Syrjälä2014-09-031-0/+10
* drm/i915: Fix gen2 planes B and C max watermark valueVille Syrjälä2014-09-031-4/+20
* drm/i915: Init some CHV workarounds via LRIs in ring->init_context()Ville Syrjälä2014-09-031-14/+0
* drm/i915: Warn about odd rps values on CHVVille Syrjälä2014-09-031-0/+11
* drm/i915/bdw: BDW Software TurboDaisy Sun2014-09-031-39/+191
* drm/i915: Populate mem_freq in init_gt_powerwave()Ville Syrjälä2014-09-031-47/+43
* drm/i915/bdw: Apply workarounds in render ring init functionArun Siluvery2014-09-031-48/+0
* drm/i915: FBC flush nuke for BDWRodrigo Vivi2014-09-031-0/+10
* drm/i915: rename gen8_init_clock_gating to broadwell_init_clock_gatingPaulo Zanoni2014-09-031-2/+2
* drm/i915: call lpt_init_clock_gating on BDW tooPaulo Zanoni2014-09-031-0/+2
* drm/i915: Bring UP Power Wells before disabling RC6.Deepak S2014-09-031-0/+6
* drm/i915: Use dev_priv as first argument of for_each_pipe()Damien Lespiau2014-09-031-9/+8
* drm/i915: Add 180 degree primary plane rotation supportSonika Jindal2014-09-031-0/+6
* Merge tag 'drm-intel-next-2014-09-01' of git://anongit.freedesktop.org/drm-in...Dave Airlie2014-09-031-2/+0
|\
| * drm/i915: Remove set but unused 'gt_perf_status'Damien Lespiau2014-08-111-2/+0
* | Merge tag 'drm-intel-next-2014-08-08' of git://anongit.freedesktop.org/drm-in...Dave Airlie2014-08-261-54/+474
|\ \ | |/
| * drm/i915: Add sprite watermark programming for VLV and CHVGajanan Bhat2014-08-081-0/+33
| * drm/i915: Round-up clock and limit drain latencyGajanan Bhat2014-08-081-1/+4
| * drm/i915: Generalize drain latency computationGajanan Bhat2014-08-081-37/+50
| * drm/i915: Polish the chv cmnlane resrt macrosVille Syrjälä2014-08-081-4/+4
| * drm/i915: Hack to tie both common lanes together on chvVille Syrjälä2014-08-081-2/+12
| * drm/i915: Add cherryview_update_wm()Ville Syrjälä2014-08-081-1/+80
| * drm/i915: Update DDL only for current CRTCGajanan Bhat2014-08-081-16/+9
| * drm/i915: Parametrize VLV_DDL registersVille Syrjälä2014-08-081-29/+23
| * drm/i915: Fill out the FWx watermark register definesVille Syrjälä2014-08-081-4/+7
| * drm/i915: Introduce FBC False Color for debug purposes.Rodrigo Vivi2014-08-081-0/+3
| * drm/i915: Split a few long debug printsVille Syrjälä2014-08-081-2/+4
| * drm/i915: Add chv port D TX wellsVille Syrjälä2014-08-081-0/+23
| * drm/i915: Add chv port B and C TX wellsVille Syrjälä2014-08-081-0/+30
| * drm/i915: Add per-pipe power wells for chvVille Syrjälä2014-08-081-0/+126
| * drm/i915: Add disp2d power well for chvVille Syrjälä2014-08-081-0/+8
| * drm/i915: Add chv cmnlane power wellsVille Syrjälä2014-08-081-0/+89
| * drm/i915: Add chv_power_wells[]Ville Syrjälä2014-08-081-0/+11
* | Merge tag 'drm-intel-fixes-2014-08-08' of git://anongit.freedesktop.org/drm-i...Linus Torvalds2014-08-081-22/+19
|\ \ | |/
| * drm/i915: Fix threshold for choosing 32 vs. 64 precisions for VLV DDL valuesVille Syrjälä2014-08-071-5/+4
| * drm/i915: Fix drain latency precision multipler for VLVZhenyu Wang2014-08-071-6/+6
| * drm/i915: Tune down MCH_SSKPD values warningDaniel Vetter2014-08-071-5/+3
| * drm/i915: Tune done rc6 enabling outputDaniel Vetter2014-08-071-6/+6
* | Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds2014-08-071-218/+679
|\ \ | |/
| * drm/i915: add helper for checking whether IRQs are enabledJesse Barnes2014-07-231-3/+3
| * drm/i915: extract and improve gen8_irq_power_well_post_enablePaulo Zanoni2014-07-231-16/+2
| * drm/i915: Use genX_ prefix for gt irq enable/disable functionsDaniel Vetter2014-07-231-2/+2
| * drm/i915: Also give the sprite width for WM computationDamien Lespiau2014-07-231-6/+11
| * drm/i915/chv: Drop WaGsvBringDownFreqInRc6Deepak S2014-07-231-1/+3
| * drm/i915: Force GPU Freq to lowest while suspending.Deepak S2014-07-231-0/+3
OpenPOWER on IntegriCloud