| Commit message (Expand) | Author | Age | Files | Lines |
* | drm/i915: Fix iboost setting for SKL Y/U DP DDI buffer translation entry 2 | Ville Syrjälä | 2016-08-11 | 1 | -2/+2 |
* | drm/i915: Program iboost settings for HDMI/DVI on SKL | Ville Syrjälä | 2016-08-11 | 1 | -11/+40 |
* | drm/i915: Fix iboost setting for DDI with 4 lanes on SKL | Ville Syrjälä | 2016-08-11 | 1 | -13/+23 |
* | drm/i915: s/INTEL_OUTPUT_DISPLAYPORT/INTEL_OUTPUT_DP/ | Ville Syrjälä | 2016-07-07 | 1 | -8/+8 |
* | drm/i915: Kill has_dp_encoder from pipe_config | Ville Syrjälä | 2016-07-07 | 1 | -2/+1 |
* | drm/i915: Mass convert dev->dev_private to to_i915(dev) | Chris Wilson | 2016-07-04 | 1 | -18/+18 |
* | drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register() | Chris Wilson | 2016-06-30 | 1 | -1/+4 |
* | drm/i915/bxt: Sanitiy check the PHY lane power down status | Imre Deak | 2016-06-13 | 1 | -0/+25 |
* | drm/i915/bxt: Rename broxton to bxt in PHY/CDCLK function prefixes | Imre Deak | 2016-06-13 | 1 | -7/+6 |
* | drm/i915/bxt: Set DDI PHY lane latency optimization during modeset | Imre Deak | 2016-06-13 | 1 | -43/+80 |
* | drm/i915/bxt: Move DDI PHY enabling/disabling to the power well code | Imre Deak | 2016-06-13 | 1 | -37/+9 |
* | drm/i915/bxt: Wait for PHY1 GRC calibration synchronously | Imre Deak | 2016-06-13 | 1 | -12/+3 |
* | drm/i915: Give encoders useful names | Ville Syrjälä | 2016-05-30 | 1 | -1/+1 |
* | drm/i915: Remove intel_clock_t typedef | Ander Conselvan de Oliveira | 2016-05-13 | 1 | -1/+1 |
* | drm/i915: Enable/disable TMDS output buffers in DP++ adaptor as needed | Ville Syrjälä | 2016-05-09 | 1 | -0/+12 |
* | Revert "drm/i915: start adding dp mst audio" | Lyude | 2016-05-03 | 1 | -19/+5 |
* | drm/i915: Set crtc_state->lane_count for HDMI | Ander Conselvan de Oliveira | 2016-04-29 | 1 | -1/+3 |
* | drm/i915/bxt: Force reprogramming a PHY with invalid HW state | Imre Deak | 2016-04-22 | 1 | -5/+14 |
* | drm/i915/bxt: Wait for PHY1 GRC done if PHY0 was already enabled | Imre Deak | 2016-04-22 | 1 | -3/+18 |
* | drm/i915/bxt: Use PHY0 GRC value for HW state verification | Imre Deak | 2016-04-22 | 1 | -1/+1 |
* | drm/i915: Fix eDP low vswing for Broadwell | Mika Kahola | 2016-04-20 | 1 | -2/+10 |
* | drm/i915/ddi: Fix eDP VDD handling during booting and suspend/resume | Imre Deak | 2016-04-19 | 1 | -7/+3 |
* | drm/i915/bxt: Add HW state verification for DDI PHY and CDCLK | Imre Deak | 2016-04-15 | 1 | -2/+122 |
* | drm/i915/bxt: Don't reprogram an already enabled DDI PHY | Imre Deak | 2016-04-15 | 1 | -0/+40 |
* | drm/i915/bxt: Power down DDI PHYs separately during the per PHY uninit | Imre Deak | 2016-04-15 | 1 | -3/+4 |
* | drm/i915/bxt: Pass drm_i915_private to DDI PHY, CDCLK helpers | Imre Deak | 2016-04-15 | 1 | -6/+4 |
* | drm/i915/bxt: Add a note about BXT_PORT_CL1CM_DW30 being read-only | Imre Deak | 2016-04-15 | 1 | -0/+3 |
* | drm/i915/ddi: Silence compiler warning for unknown output type | Chris Wilson | 2016-04-04 | 1 | -3/+3 |
* | drm/i915: Disable FDI RX before DDI_BUF_CTL | Ville Syrjälä | 2016-04-01 | 1 | -6/+12 |
* | drm/i915: use for_each_port_masked in bxt phy init for clarity | Jani Nikula | 2016-04-01 | 1 | -3/+7 |
* | drm/i915: BXT DDI PHY sequence BUN | Vandana Kannan | 2016-04-01 | 1 | -2/+11 |
* | drm/i915: move edp low vswing config to vbt data | Jani Nikula | 2016-03-29 | 1 | -2/+2 |
* | drm/i915: use a substruct in vbt data for edp | Jani Nikula | 2016-03-29 | 1 | -4/+4 |
* | drm/i915/bxt: add dsi transcoders | Jani Nikula | 2016-03-21 | 1 | -0/+6 |
* | drm/i915: Make SKL/KBL DPLL0 managed by the shared dpll code | Ander Conselvan de Oliveira | 2016-03-09 | 1 | -21/+0 |
* | drm/i915: Manage HSW/BDW LCPLLs with the shared dpll interface | Ander Conselvan de Oliveira | 2016-03-09 | 1 | -11/+7 |
* | drm/i915: Move BXT pll configuration logic to intel_dpll_mgr.c | Ander Conselvan de Oliveira | 2016-03-09 | 1 | -140/+1 |
* | drm/i915: Move SKL/KLB pll selection logic to intel_dpll_mgr.c | Ander Conselvan de Oliveira | 2016-03-09 | 1 | -300/+1 |
* | drm/i915: Move HSW/BDW pll selection logic to intel_dpll_mgr.c | Ander Conselvan de Oliveira | 2016-03-09 | 1 | -260/+11 |
* | drm/i915: Store a direct pointer to shared dpll in intel_crtc_state | Ander Conselvan de Oliveira | 2016-03-09 | 1 | -1/+3 |
* | drm/i915: Move ddi shared dpll code to intel_dpll_mgr.c | Ander Conselvan de Oliveira | 2016-03-09 | 1 | -472/+0 |
* | drm/i915: Fix bogus dig_port_map[] assignment for pre-HSW | Takashi Iwai | 2016-03-07 | 1 | -1/+0 |
* | drm/i915/ddi: Ensure the HW is powered during HW state readout | Imre Deak | 2016-02-17 | 1 | -33/+79 |
* | drm/i915/skl: Explicitly check for eDP in skl_ddi_pll_select() | Lyude | 2016-02-09 | 1 | -1/+3 |
* | drm/i915/skl: Don't skip mst encoders in skl_ddi_pll_select() | Lyude | 2016-02-09 | 1 | -1/+2 |
* | drm/i915: Check DDI max lanes after applying BXT workaround | Matt Roper | 2016-02-02 | 1 | -1/+3 |
* | Merge remote-tracking branch 'airlied/drm-next' into drm-intel-next-queued | Daniel Vetter | 2016-01-18 | 1 | -1/+1 |
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| * | Merge tag 'drm-intel-next-2015-12-18' of git://anongit.freedesktop.org/drm-in... | Dave Airlie | 2015-12-23 | 1 | -19/+36 |
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| * \ | Merge tag 'drm-intel-next-2015-12-04-1' of git://anongit.freedesktop.org/drm-... | Dave Airlie | 2015-12-15 | 1 | -1/+1 |
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| * | | | drm: Pass 'name' to drm_encoder_init() | Ville Syrjälä | 2015-12-11 | 1 | -1/+1 |