| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | clk: qcom: add parent map for regmap mux | Abhishek Sahu | 2017-12-21 | 1 | -1/+10 |
| * | clk: qcom: Add rcg ops to return floor value closest to the requested rate | Rajendra Nayak | 2016-11-23 | 1 | -0/+2 |
| * | clk: qcom: Enable FSM mode for votable alpha PLLs | Rajendra Nayak | 2016-11-01 | 1 | -0/+9 |
| * | clk: qcom: common: Add API to register board clocks backwards compatibly | Stephen Boyd | 2015-11-16 | 1 | -0/+4 |
| * | clk: qcom: Drop calls to qcom_cc_remove() | Stephen Boyd | 2015-10-08 | 1 | -2/+0 |
| * | clk: qcom: gdsc: Prepare common clk probe to register gdscs | Rajendra Nayak | 2015-09-16 | 1 | -0/+2 |
| * | clk: qcom: Introduce parent_map tables | Georgi Djakov | 2015-03-23 | 1 | -0/+4 |
| * | clk: qcom: Consolidate frequency finding logic | Stephen Boyd | 2014-09-22 | 1 | -0/+4 |
| * | clk: qcom: Fix PLL rate configurations | Stephen Boyd | 2014-07-15 | 1 | -0/+6 |
| * | clk: qcom: Consolidate common probe code | Stephen Boyd | 2014-04-30 | 1 | -0/+34 |
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index : op-kernel-dev | |
| Development kernel branch for OpenPOWER systems | Raptor Engineering, LLC |
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