| Commit message (Expand) | Author | Age | Files | Lines |
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| * | Merge commit 'v2.6.39-rc7' into perf/core | Ingo Molnar | 2011-05-10 | 1 | -35/+52 |
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| | * | perf events, x86: Fix Intel Nehalem and Westmere last level cache event defin... | Peter Zijlstra | 2011-05-06 | 1 | -35/+52 |
| * | | Merge branch 'perf/stat' into perf/core | Ingo Molnar | 2011-05-06 | 1 | -10/+21 |
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| | * | | perf events, x86: Add Westmere stalled-cycles-frontend/backend events | Ingo Molnar | 2011-04-29 | 1 | -0/+6 |
| | * | | perf, x86: Add new stalled cycles events for Intel and AMD CPUs | Ingo Molnar | 2011-04-29 | 1 | -1/+3 |
| | * | | perf events: Add generic front-end and back-end stalled cycle event definitions | Ingo Molnar | 2011-04-29 | 1 | -1/+1 |
| | * | | perf event, x86: Use better stalled cycles metric | Ingo Molnar | 2011-04-28 | 1 | -2/+2 |
| | * | | perf events, x86: Mark constrant tables read mostly | Ingo Molnar | 2011-04-26 | 1 | -10/+10 |
| | * | | perf events: Add stalled cycles generic event - PERF_COUNT_HW_STALLED_CYCLES | Ingo Molnar | 2011-04-26 | 1 | -0/+3 |
| * | | | perf events, x86: Add SandyBridge stalled-cycles-frontend/backend events | Lin Ming | 2011-05-06 | 1 | -0/+6 |
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| * | | perf, x86, nmi: Move LVT un-masking into irq handlers | Don Zickus | 2011-04-27 | 1 | -0/+10 |
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| * | perf events, x86: Work around the Nehalem AAJ80 erratum | Ingo Molnar | 2011-04-26 | 1 | -2/+14 |
| * | perf, x86: Fix BTS condition | Peter Zijlstra | 2011-04-26 | 1 | -0/+3 |
| * | perf, x86: Update/fix Intel Nehalem cache events | Peter Zijlstra | 2011-04-22 | 1 | -4/+4 |
| * | perf: Support Xeon E7's via the Westmere PMU driver | Andi Kleen | 2011-04-22 | 1 | -0/+1 |
| * | perf: Avoid the percore allocations if the CPU is not HT capable | Lin Ming | 2011-03-05 | 1 | -6/+12 |
| * | perf: Fix LLC-* events on Intel Nehalem/Westmere | Andi Kleen | 2011-03-04 | 1 | -12/+69 |
| * | perf: Add support for supplementary event registers | Andi Kleen | 2011-03-04 | 1 | -0/+198 |
| * | perf_events: Update PEBS event constraints | Stephane Eranian | 2011-03-04 | 1 | -0/+4 |
| * | Merge branch 'perf/urgent' into perf/core | Ingo Molnar | 2011-03-04 | 1 | -0/+124 |
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| | * | perf, x86: Add Intel SandyBridge CPU support | Lin Ming | 2011-03-02 | 1 | -0/+124 |
| * | | perf, x86: Calculate perfctr msr addresses in helper functions | Robert Richter | 2011-02-16 | 1 | -2/+2 |
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| * | Merge branch 'for-2.6.38' of git://git.kernel.org/pub/scm/linux/kernel/git/tj... | Linus Torvalds | 2011-01-07 | 1 | -2/+2 |
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| | * | x86: Use this_cpu_ops to optimize code | Tejun Heo | 2010-12-30 | 1 | -2/+2 |
| * | | perf, x86: Provide a PEBS capable cycle event | Peter Zijlstra | 2010-12-16 | 1 | -0/+26 |
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| * | perf_events: Fix BTS interrupt handling to avoid being dazed by NMI (v2) | Stephane Eranian | 2010-09-13 | 1 | -3/+3 |
| * | perf: Rework the PMU methods | Peter Zijlstra | 2010-09-09 | 1 | -1/+1 |
| * | perf, x86: Fix handle_irq return values | Peter Zijlstra | 2010-09-03 | 1 | -2/+7 |
| * | perf, x86: Fix accidentally ack'ing a second event on intel perf counter | Don Zickus | 2010-09-03 | 1 | -4/+2 |
| * | perf, x86: Fix Intel-nhm PMU programming errata workaround | Zhang, Yanmin | 2010-08-18 | 1 | -18/+63 |
| * | perf_events: Fix Intel Westmere event constraints | Stephane Eranian | 2010-06-10 | 1 | -0/+1 |
| * | perf, x86: Improve the PEBS ABI | Peter Zijlstra | 2010-05-07 | 1 | -2/+2 |
| * | perf, x86: Pass enable bit mask to __x86_pmu_enable_event() | Robert Richter | 2010-05-07 | 1 | -2/+3 |
| * | Merge branch 'linus' into perf/core | Ingo Molnar | 2010-04-08 | 1 | -0/+1 |
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| | * | perf, x86: Enable Nehalem-EX support | Vince Weaver | 2010-04-06 | 1 | -0/+1 |
| * | | perf, x86: Add Nehalem programming quirk to Westmere | Peter Zijlstra | 2010-04-02 | 1 | -0/+2 |
| * | | perf, x86: Fix __initconst vs const | Peter Zijlstra | 2010-04-02 | 1 | -6/+6 |
| * | | perf, x86: Fix up the ANY flag stuff | Peter Zijlstra | 2010-04-02 | 1 | -4/+26 |
| * | | perf, x86: implement ARCH_PERFMON_EVENTSEL bit masks | Robert Richter | 2010-04-02 | 1 | -20/+2 |
| * | | perf, x86: Undo some some *_counter* -> *_event* renames | Robert Richter | 2010-04-02 | 1 | -8/+8 |
| * | | perf, x86: Add Nehelem PMU programming errata workaround | Peter Zijlstra | 2010-03-26 | 1 | -4/+39 |
| * | | perf, x86: Implement initial P4 PMU driver | Cyrill Gorcunov | 2010-03-11 | 1 | -5/+10 |
| * | | perf, x86: Remove checking_{wr,rd}msr() usage | Peter Zijlstra | 2010-03-10 | 1 | -3/+2 |
| * | | perf, x86: Reorder intel_pmu_enable_all() | Peter Zijlstra | 2010-03-10 | 1 | -3/+2 |
| * | | perf, x86: Clear the LBRs on init | Peter Zijlstra | 2010-03-10 | 1 | -2/+16 |
| * | | perf, x86: Disable PEBS on clovertown chips | Peter Zijlstra | 2010-03-10 | 1 | -0/+27 |
| * | | perf, x86: Clean up IA32_PERF_CAPABILITIES usage | Peter Zijlstra | 2010-03-10 | 1 | -0/+10 |
| * | | perf, x86: use LBR for PEBS IP+1 fixup | Peter Zijlstra | 2010-03-10 | 1 | -2/+2 |
| * | | perf, x86: Implement simple LBR support | Peter Zijlstra | 2010-03-10 | 1 | -0/+13 |
| * | | perf, x86: Add PEBS infrastructure | Peter Zijlstra | 2010-03-10 | 1 | -116/+34 |
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