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* dma-mapping: consolidate dma_{alloc,free}_noncoherentChristoph Hellwig2015-09-101-5/+15
* dma-mapping: consolidate dma_{alloc,free}_{attrs,coherent}Christoph Hellwig2015-09-101-7/+0
* MIPS: Set trap_no field in thread_struct on exception.Ralf Baechle2015-09-031-4/+4
* MIPS: Add implementation of dma_map_ops.mmap()Alex Smith2015-09-031-0/+35
* MIPS: Refactor dumping of TLB registers for r3k/r4kJames Hogan2015-09-031-1/+1
* MIPS: mm: default platform_maar_init using bootmem dataPaul Burton2015-09-031-2/+34
* MIPS: Add platform callback before initializing the L2 cacheMarkos Chandras2015-08-261-0/+10
* MIPS: CM3: Add support for CM3 L2 cache.Paul Burton2015-08-261-0/+32
* MIPS: Add cases for CPU_I6400Markos Chandras2015-08-261-0/+1
* MIPS: Partially disable RIXI support.Ralf Baechle2015-08-031-4/+4
* MIPS: Handle page faults of executable but unreadable pages correctly.Ralf Baechle2015-08-031-1/+2
* MIPS: c-r4k: Extend way_string arrayPaul Burton2015-07-101-1/+3
* MIPS: c-r4k: Fix cache flushing for MT coresMarkos Chandras2015-07-101-3/+11
* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2015-06-276-39/+69
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| * MIPS: use for_each_sg()Akinobu Mita2015-06-211-10/+20
| * MIPS: tlbex: Avoid unnecessary _PAGE_PRESENT shiftsJames Hogan2015-06-211-6/+17
| * MIPS: tlbex: Fix broken offsets on r2 without XPAJames Hogan2015-06-211-4/+8
| * MIPS: tlbex.c: Remove new instance of __cpuinitdata that crept back inPaul Gortmaker2015-06-211-1/+1
| * MIPS: c-r4k: Remove legacy __cpuinit section that crept inPaul Gortmaker2015-06-211-1/+1
| * MIPS: BCM77xx: Remove legacy __cpuinit{,data} sections that crept inPaul Gortmaker2015-06-211-1/+1
| * MIPS: tlb-r3k: Optimise a TLBWI barrier in TLB invalidationMaciej W. Rozycki2015-06-211-2/+2
| * MIPS: tlb-r3k: Move CP0.Wired register initialisation to `tlb_init'Maciej W. Rozycki2015-06-212-5/+8
| * MIPS: tlb-r3k: Also invalidate wired TLB entries on bootMaciej W. Rozycki2015-06-211-11/+13
* | mm/hugetlb: reduce arch dependent code about huge_pmd_unshareZhang Zhen2015-06-241-5/+0
* | Merge branch 'sched-core-for-linus' of git://git.kernel.org/pub/scm/linux/ker...Linus Torvalds2015-06-223-3/+8
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| * mm/fault, arch: Use pagefault_disable() to check for disabled pagefaults in t...David Hildenbrand2015-05-191-2/+2
| * sched/preempt, mm/kmap, MIPS: Disable preemption in kmap_coherent() explicitlyDavid Hildenbrand2015-05-191-0/+2
| * sched/preempt, mm/kmap: Explicitly disable/enable preemption in kmap_atomic_*David Hildenbrand2015-05-191-1/+4
* | MIPS: c-r4k: Fix typo in probe_scache()Joshua Kinard2015-06-061-1/+1
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* MIPS: tlb-r4k: Fix PG_ELPA commentJames Hogan2015-05-151-1/+1
* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2015-04-177-67/+148
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| * Merge branch '4.0-fixes' into mips-for-linux-nextRalf Baechle2015-04-134-54/+119
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| | * Revert "MIPS: Avoid pipeline stalls on some MIPS32R2 cores."Ralf Baechle2015-04-101-19/+2
| | * MIPS: Fix race condition in lazy cache flushing.Lars Persson2015-03-251-0/+12
| | * Revert "MIPS: Remove race window in page fault handling"Lars Persson2015-03-251-19/+8
| | * MIPS: Add support for XPA.Steven J. Hill2015-03-193-14/+95
| | * MIPS: Rearrange PTE bits into fixed positions.Steven J. Hill2015-03-181-2/+2
| * | MIPS: c-r4k.c: Fix the 74K D-cache alias erratum workaroundMaciej W. Rozycki2015-04-021-8/+15
| * | MIPS: Add R16000 detectionJoshua Kinard2015-04-014-4/+11
| * | MIPS: DMA: Implement platform hook to perform post-DMA cache flushes.Ralf Baechle2015-04-011-1/+3
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* | mm: expose arch_mmap_rnd when availableKees Cook2015-04-141-2/+2
* | mips: extract logic for mmap_rnd()Kees Cook2015-04-141-8/+16
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* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2015-02-219-41/+104
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| * MIPS: mm: Remove dead macro definitionsAndreas Ruprecht2015-02-202-16/+0
| * MIPS: OCTEON: Implement DCache errata workaround for all CN6XXXDavid Daney2015-02-201-1/+1
| * MIPS: Add set/clear CP0 macros for PageGrain registerSteven J. Hill2015-02-201-3/+3
| * MIPS: mm: scache: Add secondary cache support for MIPS R6 coresMarkos Chandras2015-02-172-2/+4
| * MIPS: mm: c-r4k: Set the correct ISA levelMarkos Chandras2015-02-171-1/+1
| * MIPS: mm: tlbex: Use cpu_has_mips_r2_exec_hazard for the EHB instructionLeonid Yegoshin2015-02-171-3/+3
| * MIPS: mm: page: Add MIPS R6 supportMarkos Chandras2015-02-171-4/+26
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