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path: root/arch/mips/math-emu/cp1emu.c
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* MIPS: math-emu: Fix BC1EQZ and BC1NEZ condition handlingDouglas Leung2017-04-101-4/+6
* Replace <asm/uaccess.h> with <linux/uaccess.h> globallyLinus Torvalds2016-12-241-1/+1
* treewide: remove redundant #include <linux/kconfig.h>Masahiro Yamada2016-10-111-1/+0
* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2016-08-061-4/+4
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| * MIPS: Use per-mm page to execute branch delay slot instructionsPaul Burton2016-08-021-4/+4
* | tree-wide: replace config_enabled() with IS_ENABLED()Masahiro Yamada2016-08-041-3/+3
* | MIPS: inst.h: Rename cbcond{0,1}_op to pop{1,3}0_opPaul Burton2016-07-051-2/+2
* | MIPS: inst.h: Rename b{eq,ne}zcji[al]c_op to pop{6,7}6_opPaul Burton2016-07-051-2/+2
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* MIPS: math-emu: Fix jalr emulation when rd == $0Paul Burton2016-05-131-3/+5
* MIPS: math-emu: Emulate MIPSr6 sel.fmt instructionPaul Burton2016-05-131-2/+24
* MIPS: math-emu: Fix BC1{EQ,NE}Z emulationPaul Burton2016-05-131-5/+6
* MIPS: math-emu: Correctly handle NOP emulationMaciej W. Rozycki2016-01-241-0/+4
* MIPS: math-emu: Add support for the MIPS R6 MAX{, A} FPU instructionMarkos Chandras2015-09-031-0/+48
* MIPS: math-emu: Add support for the MIPS R6 MIN{, A} FPU instructionMarkos Chandras2015-09-031-0/+48
* MIPS: math-emu: Add support for the MIPS R6 CLASS FPU instructionMarkos Chandras2015-09-031-0/+24
* MIPS: math-emu: Add support for the MIPS R6 RINT FPU instructionMarkos Chandras2015-09-031-0/+24
* MIPS: math-emu: Add support for the MIPS R6 MSUBF FPU instructionMarkos Chandras2015-09-031-0/+26
* MIPS: math-emu: Add support for the MIPS R6 MADDF FPU instructionMarkos Chandras2015-09-031-0/+26
* MIPS: math-emu: Add support for the MIPS R6 SELNEZ FPU instructionMarkos Chandras2015-09-031-0/+22
* MIPS: math-emu: Add support for the MIPS R6 SELEQZ FPU instructionMarkos Chandras2015-09-031-0/+23
* MIPS: math-emu: Add support for the CMP.condn.fmt R6 instructionMarkos Chandras2015-09-031-9/+121
* MIPS: math-emu: Emulate missing BC1{EQ,NE}Z instructionsMarkos Chandras2015-09-031-1/+19
* MIPS: math-emu: Allow m{f,t}hc emulation on MIPS R6Markos Chandras2015-09-031-2/+2
* MIPS: cp1emu: Fix closing bracket for the d_fmt caseMarkos Chandras2015-09-031-1/+4
* MIPS: Fix erroneous JR emulation for MIPS R6Markos Chandras2015-07-091-1/+1
* MIPS: Fix branch emulation for BLTC and BGEC instructionsMarkos Chandras2015-07-091-2/+2
* MIPS: Fix a preemption issue with thread's FPU defaultsMaciej W. Rozycki2015-05-121-2/+2
* MIPS: Respect the ISA level in FCSR handlingMaciej W. Rozycki2015-04-081-3/+4
* MIPS: math-emu: Define IEEE 754-2008 feature control bitsMaciej W. Rozycki2015-04-081-2/+3
* MIPS: math-emu: Implement the FCCR, FEXR and FENR registersMaciej W. Rozycki2015-04-081-15/+91
* MIPS: math-emu: Set FIR feature flags for full emulationMaciej W. Rozycki2015-04-081-1/+2
* MIPS: math-emu: Correct delay-slot exception propagationMaciej W. Rozycki2015-04-081-5/+29
* MIPS: Correct FP ISA requirementsMaciej W. Rozycki2015-04-081-28/+27
* MIPS: math-emu: Factor out CFC1/CTC1 emulationMaciej W. Rozycki2015-04-081-28/+48
* MIPS: math-emu: Remove `modeindex' macroMaciej W. Rozycki2015-04-081-18/+8
* MIPS: math-emu: Reindent `bc_op' emulationMaciej W. Rozycki2015-04-081-11/+11
* MIPS: Handle MIPS IV, V and R2 FPU instructions on MIPS R6 as wellMarkos Chandras2015-02-171-4/+4
* MIPS: kernel: mips-r2-to-r6-emul: Add R2 emulator for MIPS R6Leonid Yegoshin2015-02-171-1/+2
* MIPS: Emulate the new MIPS R6 BNEZC and JIALC instructionsMarkos Chandras2015-02-171-0/+9
* MIPS: Emulate the new MIPS R6 BEQZC and JIC instructionsMarkos Chandras2015-02-171-0/+7
* MIPS: Emulate the new MIPS R6 BALC instructionMarkos Chandras2015-02-171-0/+8
* MIPS: Emulate the new MIPS R6 BNVC, BNEC and BNEZLAC instructionsMarkos Chandras2015-02-171-0/+1
* MIPS: Emulate the new MIPS R6 BOVC, BEQC and BEQZALC instructionsMarkos Chandras2015-02-171-0/+9
* MIPS: Emulate the new MIPS R6 branch compact (BC) instructionMarkos Chandras2015-02-171-0/+13
* MIPS: Emulate the new MIPS R6 B{L,G}T{Z,}{AL,}C instructionsMarkos Chandras2015-02-171-0/+25
* MIPS: Emulate the new MIPS R6 B{L,G}Ε{Z,}{AL,}C instructionsMarkos Chandras2015-02-171-0/+24
* MIPS: Emulate the BC1{EQ,NE}Z FPU instructionsMarkos Chandras2015-02-171-0/+27
* MIPS: kernel: branch: Do not emulate the branch likelies on MIPS R6Markos Chandras2015-02-171-6/+26
* MIPS: kernel: Prepare the JR instruction for emulation on MIPS R6Markos Chandras2015-02-171-0/+3
* MIPS: Support for hybrid FPRsPaul Burton2014-11-241-2/+7
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