| Commit message (Expand) | Author | Age | Files | Lines |
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| * | ARM: 8560/1: errata: Workaround errata A12 825619 / A17 852421 | Doug Anderson | 2016-07-14 | 1 | -0/+11 |
| * | ARM: 8559/1: errata: Workaround erratum A12 821420 | Doug Anderson | 2016-07-14 | 1 | -0/+5 |
| * | ARM: 8558/1: errata: Workaround errata A12 818325/852422 A17 852423 | Doug Anderson | 2016-07-14 | 1 | -0/+27 |
| * | ARM: SMP enable of cache maintanence broadcast | Russell King | 2016-04-01 | 1 | -5/+5 |
| * | ARM: make the physical-relative calculation more obvious | Russell King | 2016-02-17 | 1 | -1/+1 |
| * | ARM: 8512/1: proc-v7.S: Adjust stack address when XIP_KERNEL | Nicolas Pitre | 2016-02-16 | 1 | -1/+1 |
| * | Merge branches 'misc' and 'misc-rc6' into for-linus | Russell King | 2016-01-05 | 1 | -7/+16 |
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| | * | ARM: 8453/2: proc-v7.S: don't locate temporary stack space in .text section | Nicolas Pitre | 2015-12-17 | 1 | -7/+16 |
| * | | ARM: 8471/1: need to save/restore arm register(r11) when it is corrupted | Anson Huang | 2015-12-15 | 1 | -2/+2 |
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| * | ARM: invalidate L1 before enabling coherency | Russell King | 2015-07-17 | 1 | -5/+9 |
| * | Merge branch 'for-arm-soc' into for-next | Russell King | 2015-06-12 | 1 | -1/+1 |
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| | * | ARM: v7 setup function should invalidate L1 cache | Russell King | 2015-06-01 | 1 | -1/+1 |
| * | | ARM: proc-v7: sanitise and document registers around errata | Russell King | 2015-06-01 | 1 | -30/+38 |
| * | | ARM: proc-v7: clean up MIDR access | Russell King | 2015-06-01 | 1 | -5/+4 |
| * | | ARM: proc-v7: move CPU errata out of line | Russell King | 2015-06-01 | 1 | -65/+78 |
| * | | ARM: redo TTBR setup code for LPAE | Russell King | 2015-06-01 | 1 | -13/+13 |
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| * | ARM: proc-v7: avoid errata 430973 workaround for non-Cortex A8 CPUs | Russell King | 2015-04-14 | 1 | -0/+28 |
| * | ARM: 8314/1: replace PROCINFO embedded branch with relative offset | Ard Biesheuvel | 2015-03-28 | 1 | -14/+14 |
| *-. | Merge branches 'fixes', 'misc', 'pm' and 'sa1100' into for-next | Russell King | 2014-12-05 | 1 | -2/+3 |
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| | * | | ARM: 8196/1: vfp: Workaround bad MVFR1 register on some Kraits | Stephen Boyd | 2014-11-21 | 1 | -2/+3 |
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| * | | ARM: 8222/1: mvebu: enable strex backoff delay | Thomas Petazzoni | 2014-11-27 | 1 | -2/+0 |
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| * | ARM: 8138/1: drop ISAR0 workaround for B15 | Brian Norris | 2014-09-12 | 1 | -1/+1 |
| * | ARM: 8110/1: do CPU-specific init for Broadcom Brahma15 cores | Marc Carino | 2014-07-24 | 1 | -0/+11 |
| * | ARM: 8103/1: save/restore Cortex-A9 CP15 registers on suspend/resume | Shawn Guo | 2014-07-18 | 1 | -1/+36 |
| * | ARM: 8089/1: cpu_pj4b_suspend_size should base on cpu_v7_suspend_size | Shawn Guo | 2014-07-18 | 1 | -6/+6 |
| * | ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+ | Russell King | 2014-07-18 | 1 | -7/+7 |
| * | ARM: 8046/1: proc: add support for the Cortex-A17 processor | Will Deacon | 2014-05-25 | 1 | -0/+11 |
| * | ARM: 8013/1: PJ4B: Add cpu_suspend/cpu_resume hooks for PJ4B | Gregory CLEMENT | 2014-04-23 | 1 | -3/+25 |
| *-. | Merge branches 'amba', 'fixes', 'misc', 'mmci', 'unstable/omap-dma' and 'unst... | Russell King | 2014-04-04 | 1 | -1/+12 |
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| | | * | ARM: 7940/1: add support for the Cortex-A12 processor | Jonathan Austin | 2014-02-10 | 1 | -0/+11 |
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| | * | ARM: 7953/1: mm: ensure TLB invalidation is complete before enabling MMU | Will Deacon | 2014-02-10 | 1 | -1/+1 |
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| * | ARM: 7885/1: Save/Restore 64-bit TTBR registers on LPAE suspend/resume | Mahesh Sivasubramanian | 2013-11-14 | 1 | -5/+12 |
| * | ARM: asm: Add ARM_BE8() assembly helper | Ben Dooks | 2013-10-19 | 1 | -3/+1 |
| *-. | Merge branches 'debug-choice', 'devel-stable' and 'misc' into for-linus | Russell King | 2013-09-05 | 1 | -2/+14 |
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| | | * | ARM: 7823/1: errata: workaround Cortex-A15 erratum 773022 | Will Deacon | 2013-09-02 | 1 | -1/+13 |
| | * | | ARM: mm: use inner-shareable barriers for TLB and user cache operations | Will Deacon | 2013-08-12 | 1 | -1/+1 |
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| * | | ARM: 7784/1: mm: ensure SMP alternates assemble to exactly 4 bytes with Thumb-2 | Will Deacon | 2013-07-22 | 1 | -5/+6 |
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| * | arm: delete __cpuinit/__CPUINIT usage from all ARM users | Paul Gortmaker | 2013-07-14 | 1 | -2/+0 |
| * | Merge branch 'devel-stable' into for-next | Russell King | 2013-06-29 | 1 | -6/+21 |
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| | * | ARM: add Cortex-R7 Processor Info | Jonathan Austin | 2013-06-07 | 1 | -1/+12 |
| | * | ARM: suspend: fix CPU suspend code for !CONFIG_MMU configurations | Will Deacon | 2013-06-07 | 1 | -5/+9 |
| * | | ARM: 7773/1: PJ4B: Add support for errata 4742 | Gregory CLEMENT | 2013-06-24 | 1 | -3/+31 |
| * | | ARM: 7754/1: Fix the CPU ID and the mask associated to the PJ4B | Gregory CLEMENT | 2013-06-17 | 1 | -2/+2 |
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| *-. | Merge branches 'devel-stable', 'entry', 'fixes', 'mach-types', 'misc' and 'sm... | Russell King | 2013-05-02 | 1 | -5/+21 |
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| | | * | ARM: 7695/1: mvebu: Enable pj4b on LPAE compilations | Gregory CLEMENT | 2013-04-17 | 1 | -1/+2 |
| | | * | ARM: 7691/1: mm: kill unused TLB_CAN_READ_FROM_L1_CACHE and use ALT_SMP instead | Will Deacon | 2013-04-03 | 1 | -2/+2 |
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| | * | ARM: 7678/1: Work around faulty ISAR0 register in some Krait CPUs | Stepan Moskovchenko | 2013-03-22 | 1 | -0/+15 |
| | * | ARM: 7680/1: Detect support for SDIV/UDIV from ISAR0 register | Stephen Boyd | 2013-03-22 | 1 | -2/+2 |
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| * | ARM: 7614/1: mm: fix wrong branch from Cortex-A9 to PJ4b | Haojian Zhuang | 2013-01-06 | 1 | -0/+1 |
| * | ARM: 7609/1: disable errata work-arounds which access secure registers | Rob Herring | 2013-01-02 | 1 | -1/+2 |
