Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | ARC: [plat-hsdk]: Set initial core pll output frequency | Eugeniy Paltsev | 2017-12-20 | 1 | -0/+8 |
* | ARC: [plat-hsdk] Increase SDIO CIU frequency to 50000000Hz | Eugeniy Paltsev | 2017-10-11 | 1 | -5/+6 |
* | ARC: [plat-hsdk]: Add reset controller node to manage ethernet reset | Eugeniy Paltsev | 2017-10-06 | 1 | -0/+9 |
* | ARC: [plat-hsdk] use actual clk driver to manage cpu clk | Eugeniy Paltsev | 2017-10-03 | 1 | -2/+9 |
* | ARC: [plat-hsdk] sdio: Temporary fix of sdio ciu frequency | Eugeniy Paltsev | 2017-10-03 | 1 | -1/+11 |
* | ARC: [plat-hsdk] initial port for HSDK board | Alexey Brodkin | 2017-09-01 | 1 | -0/+189 |