Commit message (Expand) | Author | Age | Files | Lines | |
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* | ARM: socfpga: dts: Add div-reg to the main_pll clocks | Dinh Nguyen | 2014-05-05 | 1 | -2/+2 |
* | clk: socfpga: Add a clk-phase property to the "altr,socfpga-gate-clk" | Dinh Nguyen | 2014-02-18 | 1 | -0/+5 |
* | ARM: socfpga: dts: Add gate-clock bindings | Dinh Nguyen | 2013-06-11 | 1 | -0/+7 |
* | ARM: socfpga: Add clock entries into device tree | Dinh Nguyen | 2013-04-14 | 1 | -0/+18 |