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author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2008-02-06 11:16:11 -0800 |
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committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2008-02-06 11:16:11 -0800 |
commit | 3d4d4582e5b3f67a68f2cf32fd5b70d8d80f119d (patch) | |
tree | 18d270847537d1a9d1a396d03e585654130630db /include | |
parent | 8f1bfa4c5c093e97154be4ec969bdf7190aeff6a (diff) | |
parent | 47437b2c9a64315efeb3d84e97ffefd6c3c67ef1 (diff) | |
download | op-kernel-dev-3d4d4582e5b3f67a68f2cf32fd5b70d8d80f119d.zip op-kernel-dev-3d4d4582e5b3f67a68f2cf32fd5b70d8d80f119d.tar.gz |
Merge branch 'async-tx-for-linus' of git://lost.foo-projects.org/~dwillia2/git/iop into fix
* 'async-tx-for-linus' of git://lost.foo-projects.org/~dwillia2/git/iop:
async_tx: allow architecture specific async_tx_find_channel implementations
async_tx: replace 'int_en' with operation preparation flags
async_tx: kill tx_set_src and tx_set_dest methods
async_tx: kill ASYNC_TX_ASSUME_COHERENT
iop-adma: use LIST_HEAD instead of LIST_HEAD_INIT
async_tx: use LIST_HEAD instead of LIST_HEAD_INIT
async_tx: fix compile breakage, mark do_async_xor __always_inline
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-arm/arch-iop13xx/adma.h | 18 | ||||
-rw-r--r-- | include/asm-arm/hardware/iop3xx-adma.h | 30 | ||||
-rw-r--r-- | include/linux/async_tx.h | 13 | ||||
-rw-r--r-- | include/linux/dmaengine.h | 29 |
4 files changed, 53 insertions, 37 deletions
diff --git a/include/asm-arm/arch-iop13xx/adma.h b/include/asm-arm/arch-iop13xx/adma.h index 04006c1..efd9a5e 100644 --- a/include/asm-arm/arch-iop13xx/adma.h +++ b/include/asm-arm/arch-iop13xx/adma.h @@ -247,7 +247,7 @@ static inline u32 iop_desc_get_src_count(struct iop_adma_desc_slot *desc, } static inline void -iop_desc_init_memcpy(struct iop_adma_desc_slot *desc, int int_en) +iop_desc_init_memcpy(struct iop_adma_desc_slot *desc, unsigned long flags) { struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc; union { @@ -257,13 +257,13 @@ iop_desc_init_memcpy(struct iop_adma_desc_slot *desc, int int_en) u_desc_ctrl.value = 0; u_desc_ctrl.field.xfer_dir = 3; /* local to internal bus */ - u_desc_ctrl.field.int_en = int_en; + u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT; hw_desc->desc_ctrl = u_desc_ctrl.value; hw_desc->crc_addr = 0; } static inline void -iop_desc_init_memset(struct iop_adma_desc_slot *desc, int int_en) +iop_desc_init_memset(struct iop_adma_desc_slot *desc, unsigned long flags) { struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc; union { @@ -274,14 +274,15 @@ iop_desc_init_memset(struct iop_adma_desc_slot *desc, int int_en) u_desc_ctrl.value = 0; u_desc_ctrl.field.xfer_dir = 3; /* local to internal bus */ u_desc_ctrl.field.block_fill_en = 1; - u_desc_ctrl.field.int_en = int_en; + u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT; hw_desc->desc_ctrl = u_desc_ctrl.value; hw_desc->crc_addr = 0; } /* to do: support buffers larger than ADMA_MAX_BYTE_COUNT */ static inline void -iop_desc_init_xor(struct iop_adma_desc_slot *desc, int src_cnt, int int_en) +iop_desc_init_xor(struct iop_adma_desc_slot *desc, int src_cnt, + unsigned long flags) { struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc; union { @@ -292,7 +293,7 @@ iop_desc_init_xor(struct iop_adma_desc_slot *desc, int src_cnt, int int_en) u_desc_ctrl.value = 0; u_desc_ctrl.field.src_select = src_cnt - 1; u_desc_ctrl.field.xfer_dir = 3; /* local to internal bus */ - u_desc_ctrl.field.int_en = int_en; + u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT; hw_desc->desc_ctrl = u_desc_ctrl.value; hw_desc->crc_addr = 0; @@ -301,7 +302,8 @@ iop_desc_init_xor(struct iop_adma_desc_slot *desc, int src_cnt, int int_en) /* to do: support buffers larger than ADMA_MAX_BYTE_COUNT */ static inline int -iop_desc_init_zero_sum(struct iop_adma_desc_slot *desc, int src_cnt, int int_en) +iop_desc_init_zero_sum(struct iop_adma_desc_slot *desc, int src_cnt, + unsigned long flags) { struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc; union { @@ -314,7 +316,7 @@ iop_desc_init_zero_sum(struct iop_adma_desc_slot *desc, int src_cnt, int int_en) u_desc_ctrl.field.xfer_dir = 3; /* local to internal bus */ u_desc_ctrl.field.zero_result = 1; u_desc_ctrl.field.status_write_back_en = 1; - u_desc_ctrl.field.int_en = int_en; + u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT; hw_desc->desc_ctrl = u_desc_ctrl.value; hw_desc->crc_addr = 0; diff --git a/include/asm-arm/hardware/iop3xx-adma.h b/include/asm-arm/hardware/iop3xx-adma.h index 10834b5..5c529e6 100644 --- a/include/asm-arm/hardware/iop3xx-adma.h +++ b/include/asm-arm/hardware/iop3xx-adma.h @@ -414,7 +414,7 @@ static inline void iop3xx_aau_desc_set_src_addr(struct iop3xx_desc_aau *hw_desc, } static inline void -iop_desc_init_memcpy(struct iop_adma_desc_slot *desc, int int_en) +iop_desc_init_memcpy(struct iop_adma_desc_slot *desc, unsigned long flags) { struct iop3xx_desc_dma *hw_desc = desc->hw_desc; union { @@ -425,14 +425,14 @@ iop_desc_init_memcpy(struct iop_adma_desc_slot *desc, int int_en) u_desc_ctrl.value = 0; u_desc_ctrl.field.mem_to_mem_en = 1; u_desc_ctrl.field.pci_transaction = 0xe; /* memory read block */ - u_desc_ctrl.field.int_en = int_en; + u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT; hw_desc->desc_ctrl = u_desc_ctrl.value; hw_desc->upper_pci_src_addr = 0; hw_desc->crc_addr = 0; } static inline void -iop_desc_init_memset(struct iop_adma_desc_slot *desc, int int_en) +iop_desc_init_memset(struct iop_adma_desc_slot *desc, unsigned long flags) { struct iop3xx_desc_aau *hw_desc = desc->hw_desc; union { @@ -443,12 +443,13 @@ iop_desc_init_memset(struct iop_adma_desc_slot *desc, int int_en) u_desc_ctrl.value = 0; u_desc_ctrl.field.blk1_cmd_ctrl = 0x2; /* memory block fill */ u_desc_ctrl.field.dest_write_en = 1; - u_desc_ctrl.field.int_en = int_en; + u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT; hw_desc->desc_ctrl = u_desc_ctrl.value; } static inline u32 -iop3xx_desc_init_xor(struct iop3xx_desc_aau *hw_desc, int src_cnt, int int_en) +iop3xx_desc_init_xor(struct iop3xx_desc_aau *hw_desc, int src_cnt, + unsigned long flags) { int i, shift; u32 edcr; @@ -509,21 +510,23 @@ iop3xx_desc_init_xor(struct iop3xx_desc_aau *hw_desc, int src_cnt, int int_en) u_desc_ctrl.field.dest_write_en = 1; u_desc_ctrl.field.blk1_cmd_ctrl = 0x7; /* direct fill */ - u_desc_ctrl.field.int_en = int_en; + u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT; hw_desc->desc_ctrl = u_desc_ctrl.value; return u_desc_ctrl.value; } static inline void -iop_desc_init_xor(struct iop_adma_desc_slot *desc, int src_cnt, int int_en) +iop_desc_init_xor(struct iop_adma_desc_slot *desc, int src_cnt, + unsigned long flags) { - iop3xx_desc_init_xor(desc->hw_desc, src_cnt, int_en); + iop3xx_desc_init_xor(desc->hw_desc, src_cnt, flags); } /* return the number of operations */ static inline int -iop_desc_init_zero_sum(struct iop_adma_desc_slot *desc, int src_cnt, int int_en) +iop_desc_init_zero_sum(struct iop_adma_desc_slot *desc, int src_cnt, + unsigned long flags) { int slot_cnt = desc->slot_cnt, slots_per_op = desc->slots_per_op; struct iop3xx_desc_aau *hw_desc, *prev_hw_desc, *iter; @@ -538,10 +541,10 @@ iop_desc_init_zero_sum(struct iop_adma_desc_slot *desc, int src_cnt, int int_en) for (i = 0, j = 0; (slot_cnt -= slots_per_op) >= 0; i += slots_per_op, j++) { iter = iop_hw_desc_slot_idx(hw_desc, i); - u_desc_ctrl.value = iop3xx_desc_init_xor(iter, src_cnt, int_en); + u_desc_ctrl.value = iop3xx_desc_init_xor(iter, src_cnt, flags); u_desc_ctrl.field.dest_write_en = 0; u_desc_ctrl.field.zero_result_en = 1; - u_desc_ctrl.field.int_en = int_en; + u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT; iter->desc_ctrl = u_desc_ctrl.value; /* for the subsequent descriptors preserve the store queue @@ -559,7 +562,8 @@ iop_desc_init_zero_sum(struct iop_adma_desc_slot *desc, int src_cnt, int int_en) } static inline void -iop_desc_init_null_xor(struct iop_adma_desc_slot *desc, int src_cnt, int int_en) +iop_desc_init_null_xor(struct iop_adma_desc_slot *desc, int src_cnt, + unsigned long flags) { struct iop3xx_desc_aau *hw_desc = desc->hw_desc; union { @@ -591,7 +595,7 @@ iop_desc_init_null_xor(struct iop_adma_desc_slot *desc, int src_cnt, int int_en) } u_desc_ctrl.field.dest_write_en = 0; - u_desc_ctrl.field.int_en = int_en; + u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT; hw_desc->desc_ctrl = u_desc_ctrl.value; } diff --git a/include/linux/async_tx.h b/include/linux/async_tx.h index bdca3f1..eb640f0 100644 --- a/include/linux/async_tx.h +++ b/include/linux/async_tx.h @@ -47,7 +47,6 @@ struct dma_chan_ref { * address is an implied source, whereas the asynchronous case it must be listed * as a source. The destination address must be the first address in the source * array. - * @ASYNC_TX_ASSUME_COHERENT: skip cache maintenance operations * @ASYNC_TX_ACK: immediately ack the descriptor, precludes setting up a * dependency chain * @ASYNC_TX_DEP_ACK: ack the dependency descriptor. Useful for chaining. @@ -55,7 +54,6 @@ struct dma_chan_ref { enum async_tx_flags { ASYNC_TX_XOR_ZERO_DST = (1 << 0), ASYNC_TX_XOR_DROP_DST = (1 << 1), - ASYNC_TX_ASSUME_COHERENT = (1 << 2), ASYNC_TX_ACK = (1 << 3), ASYNC_TX_DEP_ACK = (1 << 4), }; @@ -64,9 +62,15 @@ enum async_tx_flags { void async_tx_issue_pending_all(void); enum dma_status dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx); void async_tx_run_dependencies(struct dma_async_tx_descriptor *tx); +#ifdef CONFIG_ARCH_HAS_ASYNC_TX_FIND_CHANNEL +#include <asm/async_tx.h> +#else +#define async_tx_find_channel(dep, type, dst, dst_count, src, src_count, len) \ + __async_tx_find_channel(dep, type) struct dma_chan * -async_tx_find_channel(struct dma_async_tx_descriptor *depend_tx, +__async_tx_find_channel(struct dma_async_tx_descriptor *depend_tx, enum dma_transaction_type tx_type); +#endif /* CONFIG_ARCH_HAS_ASYNC_TX_FIND_CHANNEL */ #else static inline void async_tx_issue_pending_all(void) { @@ -88,7 +92,8 @@ async_tx_run_dependencies(struct dma_async_tx_descriptor *tx, static inline struct dma_chan * async_tx_find_channel(struct dma_async_tx_descriptor *depend_tx, - enum dma_transaction_type tx_type) + enum dma_transaction_type tx_type, struct page **dst, int dst_count, + struct page **src, int src_count, size_t len) { return NULL; } diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h index 5c84bf8..acbb364 100644 --- a/include/linux/dmaengine.h +++ b/include/linux/dmaengine.h @@ -95,6 +95,15 @@ enum dma_transaction_type { #define DMA_TX_TYPE_END (DMA_INTERRUPT + 1) /** + * enum dma_prep_flags - DMA flags to augment operation preparation + * @DMA_PREP_INTERRUPT - trigger an interrupt (callback) upon completion of + * this transaction + */ +enum dma_prep_flags { + DMA_PREP_INTERRUPT = (1 << 0), +}; + +/** * dma_cap_mask_t - capabilities bitmap modeled after cpumask_t. * See linux/cpumask.h */ @@ -209,8 +218,6 @@ typedef void (*dma_async_tx_callback)(void *dma_async_param); * descriptors * @chan: target channel for this operation * @tx_submit: set the prepared descriptor(s) to be executed by the engine - * @tx_set_dest: set a destination address in a hardware descriptor - * @tx_set_src: set a source address in a hardware descriptor * @callback: routine to call after this operation is complete * @callback_param: general parameter to pass to the callback routine * ---async_tx api specific fields--- @@ -227,10 +234,6 @@ struct dma_async_tx_descriptor { struct list_head tx_list; struct dma_chan *chan; dma_cookie_t (*tx_submit)(struct dma_async_tx_descriptor *tx); - void (*tx_set_dest)(dma_addr_t addr, - struct dma_async_tx_descriptor *tx, int index); - void (*tx_set_src)(dma_addr_t addr, - struct dma_async_tx_descriptor *tx, int index); dma_async_tx_callback callback; void *callback_param; struct list_head depend_list; @@ -279,15 +282,17 @@ struct dma_device { void (*device_free_chan_resources)(struct dma_chan *chan); struct dma_async_tx_descriptor *(*device_prep_dma_memcpy)( - struct dma_chan *chan, size_t len, int int_en); + struct dma_chan *chan, dma_addr_t dest, dma_addr_t src, + size_t len, unsigned long flags); struct dma_async_tx_descriptor *(*device_prep_dma_xor)( - struct dma_chan *chan, unsigned int src_cnt, size_t len, - int int_en); + struct dma_chan *chan, dma_addr_t dest, dma_addr_t *src, + unsigned int src_cnt, size_t len, unsigned long flags); struct dma_async_tx_descriptor *(*device_prep_dma_zero_sum)( - struct dma_chan *chan, unsigned int src_cnt, size_t len, - u32 *result, int int_en); + struct dma_chan *chan, dma_addr_t *src, unsigned int src_cnt, + size_t len, u32 *result, unsigned long flags); struct dma_async_tx_descriptor *(*device_prep_dma_memset)( - struct dma_chan *chan, int value, size_t len, int int_en); + struct dma_chan *chan, dma_addr_t dest, int value, size_t len, + unsigned long flags); struct dma_async_tx_descriptor *(*device_prep_dma_interrupt)( struct dma_chan *chan); |