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author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-05-07 12:17:40 -0700 |
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committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-05-07 12:17:40 -0700 |
commit | 5b6b54982258c330247957a8d877b9851ac69d53 (patch) | |
tree | 567e4b3391e0c6689cf511789fb512ef7385c16f /drivers/serial | |
parent | 35c74823cb382c610be908f1b92f980b84e7c37c (diff) | |
parent | 39374aadcd0159b4744ab456f4efa100bea84bd4 (diff) | |
download | op-kernel-dev-5b6b54982258c330247957a8d877b9851ac69d53.zip op-kernel-dev-5b6b54982258c330247957a8d877b9851ac69d53.tar.gz |
Merge master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6: (38 commits)
sh: R7785RP board updates.
sh: Update r7780rp defconfig.
sh: Add die chain notifiers.
sh: Fix APM emulation on hp6xx.
sh: Wire up more IRQs for SH7709.
sh: Solution Engine 7722 board support.
sh: Fix r7780rp build.
sh: kdump support.
sh: Move clock reporting to its own proc entry.
sh: Solution Engine SH7705 board and CPU updates.
serial: sh-sci: Fix module clock refcount for serial console.
serial: sh-sci: Fix module clock refcounting.
sh: SH7722 clock framework support.
sh: hp6xx pata_platform support.
sh: Obey CONFIG_HZ for HZ definition.
sh: Fix fstatat64() syscall.
sh: se7780 PCI support.
sh: SH7780 Solution Engine board support.
sh: Add a dummy SH-4 PCIC fixup.
sh: Tidy up L-BOX area5 addresses.
...
Diffstat (limited to 'drivers/serial')
-rw-r--r-- | drivers/serial/sh-sci.c | 113 | ||||
-rw-r--r-- | drivers/serial/sh-sci.h | 83 |
2 files changed, 149 insertions, 47 deletions
diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c index 46c40bb..1f89496 100644 --- a/drivers/serial/sh-sci.c +++ b/drivers/serial/sh-sci.c @@ -46,6 +46,7 @@ #endif #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64) +#include <linux/ctype.h> #include <asm/clock.h> #include <asm/sh_bios.h> #include <asm/kgdb.h> @@ -61,7 +62,7 @@ struct sci_port { unsigned int type; /* Port IRQs: ERI, RXI, TXI, BRI (optional) */ - unsigned int irqs[SCIx_NR_IRQS]; + unsigned int irqs[SCIx_NR_IRQS]; /* Port pin configuration */ void (*init_pins)(struct uart_port *port, @@ -76,6 +77,11 @@ struct sci_port { /* Break timer */ struct timer_list break_timer; int break_flag; + +#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64) + /* Port clock */ + struct clk *clk; +#endif }; #ifdef CONFIG_SH_KGDB @@ -163,7 +169,7 @@ static void put_string(struct sci_port *sci_port, const char *buffer, int count) usegdb |= sh_bios_in_gdb_mode(); #endif #ifdef CONFIG_SH_KGDB - usegdb |= (kgdb_in_gdb_mode && (port == kgdb_sci_port)); + usegdb |= (kgdb_in_gdb_mode && (sci_port == kgdb_sci_port)); #endif if (usegdb) { @@ -204,7 +210,7 @@ static int kgdb_sci_getchar(void) int c; /* Keep trying to read a character, this could be neater */ - while ((c = get_char(kgdb_sci_port)) < 0) + while ((c = get_char(&kgdb_sci_port->port)) < 0) cpu_relax(); return c; @@ -212,7 +218,7 @@ static int kgdb_sci_getchar(void) static inline void kgdb_sci_putchar(int c) { - put_char(kgdb_sci_port, c); + put_char(&kgdb_sci_port->port, c); } #endif /* CONFIG_SH_KGDB */ @@ -283,12 +289,23 @@ static void sci_init_pins_irda(struct uart_port *port, unsigned int cflag) #endif #if defined(SCIF_ONLY) || defined(SCI_AND_SCIF) -#if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7710) +#if defined(CONFIG_CPU_SUBTYPE_SH7300) /* SH7300 doesn't use RTS/CTS */ static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) { sci_out(port, SCFCR, 0); } +#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712) +static void sci_init_pins_scif(struct uart_port* port, unsigned int cflag) +{ + unsigned int fcr_val = 0; + + set_sh771x_scif_pfc(port); + if (cflag & CRTSCTS) { + fcr_val |= SCFCR_MCE; + } + sci_out(port, SCFCR, fcr_val); +} #elif defined(CONFIG_CPU_SH3) /* For SH7705, SH7706, SH7707, SH7709, SH7709A, SH7729 */ static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) @@ -350,7 +367,7 @@ static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) } else { #ifdef CONFIG_CPU_SUBTYPE_SH7343 /* Nothing */ -#elif defined(CONFIG_CPU_SUBTYPE_SH7780) +#elif defined(CONFIG_CPU_SUBTYPE_SH7780) || defined(CONFIG_CPU_SUBTYPE_SH7785) ctrl_outw(0x0080, SCSPTR0); /* Set RTS = 1 */ #else ctrl_outw(0x0080, SCSPTR2); /* Set RTS = 1 */ @@ -360,7 +377,9 @@ static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) } #endif -#if defined(CONFIG_CPU_SUBTYPE_SH7760) || defined(CONFIG_CPU_SUBTYPE_SH7780) +#if defined(CONFIG_CPU_SUBTYPE_SH7760) || \ + defined(CONFIG_CPU_SUBTYPE_SH7780) || \ + defined(CONFIG_CPU_SUBTYPE_SH7785) static inline int scif_txroom(struct uart_port *port) { return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0x7f); @@ -735,12 +754,6 @@ static irqreturn_t sci_br_interrupt(int irq, void *ptr) /* Handle BREAKs */ sci_handle_breaks(port); - -#ifdef CONFIG_SH_KGDB - /* Break into the debugger if a break is detected */ - BREAKPOINT(); -#endif - sci_out(port, SCxSR, SCxSR_BREAK_CLEAR(port)); return IRQ_HANDLED; @@ -947,6 +960,10 @@ static int sci_startup(struct uart_port *port) if (s->enable) s->enable(port); +#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64) + s->clk = clk_get(NULL, "module_clk"); +#endif + sci_request_irq(s); sci_start_tx(port); sci_start_rx(port, 1); @@ -964,6 +981,11 @@ static void sci_shutdown(struct uart_port *port) if (s->disable) s->disable(port); + +#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64) + clk_put(s->clk); + s->clk = NULL; +#endif } static void sci_set_termios(struct uart_port *port, struct ktermios *termios, @@ -971,7 +993,6 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios, { struct sci_port *s = &sci_ports[port->line]; unsigned int status, baud, smr_val; - unsigned long flags; int t; baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); @@ -983,18 +1004,14 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios, default: { #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64) - struct clk *clk = clk_get(NULL, "module_clk"); - t = SCBRR_VALUE(baud, clk_get_rate(clk)); - clk_put(clk); + t = SCBRR_VALUE(baud, clk_get_rate(s->clk)); #else t = SCBRR_VALUE(baud); #endif - } break; + } } - spin_lock_irqsave(&port->lock, flags); - do { status = sci_in(port, SCxSR); } while (!(status & SCxSR_TEND(port))); @@ -1038,8 +1055,6 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios, if ((termios->c_cflag & CREAD) != 0) sci_start_rx(port,0); - - spin_unlock_irqrestore(&port->lock, flags); } static const char *sci_type(struct uart_port *port) @@ -1220,10 +1235,13 @@ static int __init serial_console_setup(struct console *co, char *options) if (!port->membase || !port->mapbase) return -ENODEV; - spin_lock_init(&port->lock); - port->type = serial_console_port->type; +#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64) + if (!serial_console_port->clk) + serial_console_port->clk = clk_get(NULL, "module_clk"); +#endif + if (port->flags & UPF_IOREMAP) sci_config_port(port, 0); @@ -1247,7 +1265,7 @@ static struct console serial_console = { .device = uart_console_device, .write = serial_console_write, .setup = serial_console_setup, - .flags = CON_PRINTBUFFER, + .flags = CON_PRINTBUFFER, .index = -1, .data = &sci_uart_driver, }; @@ -1292,11 +1310,23 @@ int __init kgdb_console_setup(struct console *co, char *options) int parity = 'n'; int flow = 'n'; - spin_lock_init(&port->lock); - if (co->index != kgdb_portnum) co->index = kgdb_portnum; + kgdb_sci_port = &sci_ports[co->index]; + port = &kgdb_sci_port->port; + + /* + * Also need to check port->type, we don't actually have any + * UPIO_PORT ports, but uart_report_port() handily misreports + * it anyways if we don't have a port available by the time this is + * called. + */ + if (!port->type) + return -ENODEV; + if (!port->membase || !port->mapbase) + return -ENODEV; + if (options) uart_parse_options(options, &baud, &parity, &bits, &flow); else @@ -1311,11 +1341,12 @@ int __init kgdb_console_setup(struct console *co, char *options) #ifdef CONFIG_SH_KGDB_CONSOLE static struct console kgdb_console = { - .name = "ttySC", - .write = kgdb_console_write, - .setup = kgdb_console_setup, - .flags = CON_PRINTBUFFER | CON_ENABLED, - .index = -1, + .name = "ttySC", + .device = uart_console_device, + .write = kgdb_console_write, + .setup = kgdb_console_setup, + .flags = CON_PRINTBUFFER, + .index = -1, .data = &sci_uart_driver, }; @@ -1361,9 +1392,19 @@ static int __devinit sci_probe(struct platform_device *dev) struct plat_sci_port *p = dev->dev.platform_data; int i; - for (i = 0; p && p->flags != 0 && i < SCI_NPORTS; p++, i++) { + for (i = 0; p && p->flags != 0; p++, i++) { struct sci_port *sciport = &sci_ports[i]; + /* Sanity check */ + if (unlikely(i == SCI_NPORTS)) { + dev_notice(&dev->dev, "Attempting to register port " + "%d when only %d are available.\n", + i+1, SCI_NPORTS); + dev_notice(&dev->dev, "Consider bumping " + "CONFIG_SERIAL_SH_SCI_NR_UARTS!\n"); + break; + } + sciport->port.mapbase = p->mapbase; /* @@ -1386,6 +1427,12 @@ static int __devinit sci_probe(struct platform_device *dev) uart_add_one_port(&sci_uart_driver, &sciport->port); } +#if defined(CONFIG_SH_KGDB) && !defined(CONFIG_SH_KGDB_CONSOLE) + kgdb_sci_port = &sci_ports[kgdb_portnum]; + kgdb_getchar = kgdb_sci_getchar; + kgdb_putchar = kgdb_sci_putchar; +#endif + #ifdef CONFIG_CPU_FREQ cpufreq_register_notifier(&sci_nb, CPUFREQ_TRANSITION_NOTIFIER); dev_info(&dev->dev, "sci: CPU frequency notifier registered\n"); diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h index 77f7d63..fb04fb5 100644 --- a/drivers/serial/sh-sci.h +++ b/drivers/serial/sh-sci.h @@ -73,9 +73,13 @@ # define SCPDR 0xA4050136 /* 16 bit SCIF */ # define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */ # define SCIF_ONLY -#elif defined(CONFIG_CPU_SUBTYPE_SH7710) +#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712) # define SCSPTR0 0xA4400000 /* 16 bit SCIF */ -# define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */ +# define SCI_NPORTS 2 +# define SCIF_ORER 0x0001 /* overrun error bit */ +# define PACR 0xa4050100 +# define PBCR 0xa4050102 +# define SCSCR_INIT(port) 0x3B # define SCIF_ONLY #elif defined(CONFIG_CPU_SUBTYPE_SH73180) # define SCPDR 0xA4050138 /* 16 bit SCIF */ @@ -140,6 +144,16 @@ # define SCIF_ORER 0x0001 /* Overrun error bit */ # define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ # define SCIF_ONLY +#elif defined(CONFIG_CPU_SUBTYPE_SH7785) +# define SCSPTR0 0xffea0024 /* 16 bit SCIF */ +# define SCSPTR1 0xffeb0024 /* 16 bit SCIF */ +# define SCSPTR2 0xffec0024 /* 16 bit SCIF */ +# define SCSPTR3 0xffed0024 /* 16 bit SCIF */ +# define SCSPTR4 0xffee0024 /* 16 bit SCIF */ +# define SCSPTR5 0xffef0024 /* 16 bit SCIF */ +# define SCIF_OPER 0x0001 /* Overrun error bit */ +# define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ +# define SCIF_ONLY #elif defined(CONFIG_CPU_SUBTYPE_SH7206) # define SCSPTR0 0xfffe8020 /* 16 bit SCIF */ # define SCSPTR1 0xfffe8820 /* 16 bit SCIF */ @@ -163,7 +177,10 @@ #define SCI_CTRL_FLAGS_RIE 0x40 /* all */ #define SCI_CTRL_FLAGS_TE 0x20 /* all */ #define SCI_CTRL_FLAGS_RE 0x10 /* all */ -#if defined(CONFIG_CPU_SUBTYPE_SH7750) || defined(CONFIG_CPU_SUBTYPE_SH7751) || defined(CONFIG_CPU_SUBTYPE_SH7780) +#if defined(CONFIG_CPU_SUBTYPE_SH7750) || \ + defined(CONFIG_CPU_SUBTYPE_SH7751) || \ + defined(CONFIG_CPU_SUBTYPE_SH7780) || \ + defined(CONFIG_CPU_SUBTYPE_SH7785) #define SCI_CTRL_FLAGS_REIE 0x08 /* 7750 SCIF */ #else #define SCI_CTRL_FLAGS_REIE 0 @@ -333,9 +350,15 @@ } #ifdef CONFIG_CPU_SH3 -#if defined(CONFIG_CPU_SUBTYPE_SH7300) || \ - defined(CONFIG_CPU_SUBTYPE_SH7705) || \ - defined(CONFIG_CPU_SUBTYPE_SH7710) +#if defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712) +#define SCIx_FNS(name, sh3_sci_offset, sh3_sci_size, sh4_sci_offset, sh4_sci_size, \ + sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size, \ + h8_sci_offset, h8_sci_size) \ + CPU_SCIx_FNS(name, sh4_sci_offset, sh4_sci_size, sh4_scif_offset, sh4_scif_size) +#define SCIF_FNS(name, sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size) \ + CPU_SCIF_FNS(name, sh4_scif_offset, sh4_scif_size) +#elif defined(CONFIG_CPU_SUBTYPE_SH7300) || \ + defined(CONFIG_CPU_SUBTYPE_SH7705) #define SCIF_FNS(name, scif_offset, scif_size) \ CPU_SCIF_FNS(name, scif_offset, scif_size) #else @@ -362,8 +385,8 @@ #endif #if defined(CONFIG_CPU_SUBTYPE_SH7300) || \ - defined(CONFIG_CPU_SUBTYPE_SH7705) || \ - defined(CONFIG_CPU_SUBTYPE_SH7710) + defined(CONFIG_CPU_SUBTYPE_SH7705) + SCIF_FNS(SCSMR, 0x00, 16) SCIF_FNS(SCBRR, 0x04, 8) SCIF_FNS(SCSCR, 0x08, 16) @@ -385,7 +408,9 @@ SCIx_FNS(SCxTDR, 0x06, 8, 0x0c, 8, 0x06, 8, 0x0C, 8, 0x03, 8) SCIx_FNS(SCxSR, 0x08, 8, 0x10, 8, 0x08, 16, 0x10, 16, 0x04, 8) SCIx_FNS(SCxRDR, 0x0a, 8, 0x14, 8, 0x0A, 8, 0x14, 8, 0x05, 8) SCIF_FNS(SCFCR, 0x0c, 8, 0x18, 16) -#if defined(CONFIG_CPU_SUBTYPE_SH7760) || defined(CONFIG_CPU_SUBTYPE_SH7780) +#if defined(CONFIG_CPU_SUBTYPE_SH7760) || \ + defined(CONFIG_CPU_SUBTYPE_SH7780) || \ + defined(CONFIG_CPU_SUBTYPE_SH7785) SCIF_FNS(SCFDR, 0x0e, 16, 0x1C, 16) SCIF_FNS(SCTFDR, 0x0e, 16, 0x1C, 16) SCIF_FNS(SCRFDR, 0x0e, 16, 0x20, 16) @@ -471,13 +496,24 @@ static inline int sci_rxd_in(struct uart_port *port) return ctrl_inb(SCPDR)&0x10 ? 1 : 0; /* SCIF */ return 1; } -#elif defined(CONFIG_CPU_SUBTYPE_SH7710) +#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712) static inline int sci_rxd_in(struct uart_port *port) { - if (port->mapbase == SCSPTR0) - return ctrl_inw(SCSPTR0 + 0x10) & 0x01 ? 1 : 0; - return 1; + return sci_in(port,SCxSR)&0x0010 ? 1 : 0; +} +static inline void set_sh771x_scif_pfc(struct uart_port *port) +{ + if (port->mapbase == 0xA4400000){ + ctrl_outw(ctrl_inw(PACR)&0xffc0,PACR); + ctrl_outw(ctrl_inw(PBCR)&0x0fff,PBCR); + return; + } + if (port->mapbase == 0xA4410000){ + ctrl_outw(ctrl_inw(PBCR)&0xf003,PBCR); + return; + } } + #elif defined(CONFIG_CPU_SUBTYPE_SH7750) || \ defined(CONFIG_CPU_SUBTYPE_SH7751) || \ defined(CONFIG_CPU_SUBTYPE_SH4_202) @@ -576,6 +612,23 @@ static inline int sci_rxd_in(struct uart_port *port) return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ return 1; } +#elif defined(CONFIG_CPU_SUBTYPE_SH7785) +static inline int sci_rxd_in(struct uart_port *port) +{ + if (port->mapbase == 0xffea0000) + return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ + if (port->mapbase == 0xffeb0000) + return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ + if (port->mapbase == 0xffec0000) + return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ + if (port->mapbase == 0xffed0000) + return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ + if (port->mapbase == 0xffee0000) + return ctrl_inw(SCSPTR4) & 0x0001 ? 1 : 0; /* SCIF */ + if (port->mapbase == 0xffef0000) + return ctrl_inw(SCSPTR5) & 0x0001 ? 1 : 0; /* SCIF */ + return 1; +} #elif defined(CONFIG_CPU_SUBTYPE_SH7206) static inline int sci_rxd_in(struct uart_port *port) { @@ -634,7 +687,9 @@ static inline int sci_rxd_in(struct uart_port *port) * -- Mitch Davis - 15 Jul 2000 */ -#if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7780) +#if defined(CONFIG_CPU_SUBTYPE_SH7300) || \ + defined(CONFIG_CPU_SUBTYPE_SH7780) || \ + defined(CONFIG_CPU_SUBTYPE_SH7785) #define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(16*bps)-1) #elif defined(CONFIG_CPU_SUBTYPE_SH7705) #define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(32*bps)-1) |