diff options
author | Jani Nikula <jani.nikula@intel.com> | 2018-03-06 12:41:55 +0200 |
---|---|---|
committer | Jani Nikula <jani.nikula@intel.com> | 2018-03-09 12:26:19 +0200 |
commit | 1e6aa7e55c28ecd842b8b4599e4273c2429ee061 (patch) | |
tree | d94dc6aa2194deed1477f0d8e5f442dbbc11712b /drivers/gpu/drm/i915/intel_ddi.c | |
parent | 51f6b0f99cab765477a636443ce63295b76b9bb4 (diff) | |
download | op-kernel-dev-1e6aa7e55c28ecd842b8b4599e4273c2429ee061.zip op-kernel-dev-1e6aa7e55c28ecd842b8b4599e4273c2429ee061.tar.gz |
drm/i915/icl: do not save DDI A/E sharing bit for ICL
We don't want to preserve the DDI A 4 lane bit on ICL.
Fixes: 3d2011cfa41f ("drm/i915/icl: remove port A/E lane sharing limitation.")
Cc: Mahesh Kumar <mahesh1.kumar@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180306104155.3526-1-jani.nikula@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_ddi.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_ddi.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index ac8fc2a..dbcf1a0 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -3080,9 +3080,12 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port) intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); intel_encoder->cloneable = 0; - intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) & - (DDI_BUF_PORT_REVERSAL | - DDI_A_4_LANES); + if (INTEL_GEN(dev_priv) >= 11) + intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) & + DDI_BUF_PORT_REVERSAL; + else + intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) & + (DDI_BUF_PORT_REVERSAL | DDI_A_4_LANES); intel_dig_port->dp.output_reg = INVALID_MMIO_REG; intel_dig_port->max_lanes = intel_ddi_max_lanes(intel_dig_port); |