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| author | Max Filippov <jcmvbkbc@gmail.com> | 2012-11-28 11:33:02 +0400 |
|---|---|---|
| committer | Chris Zankel <chris@zankel.net> | 2012-12-18 21:10:22 -0800 |
| commit | 00273125c39be9cbf619aef90147354a9ed8c385 (patch) | |
| tree | 331f33a0a31f9306f4612ecc25c4c9a476840966 /arch/xtensa/include/asm/regs.h | |
| parent | 28570e8dac5c86ab10ce2a7e9c02d3aaece63760 (diff) | |
| download | op-kernel-dev-00273125c39be9cbf619aef90147354a9ed8c385.zip op-kernel-dev-00273125c39be9cbf619aef90147354a9ed8c385.tar.gz | |
xtensa: add s32c1i sanity check
Add a brief sanity test of S32C1I functionality. This instruction
is needed by the kernel and userland as part of the base ABI
(including GCC atomic builtins, certain threading packages, future
atomic support in the C++ standard, etc). However, correct operation
of this instruction requires some cooperation by hardware external to
the processor (such as bus bridge, bus fabric, or memory controller).
Minimally exercising this mechanism and reporting explicit status
early in the boot process is helpful to chip vendors using the Linux
kernel as a benchmark of correctness of hardware.
As it turns out, S32C1I is not exercised by the kernel and by uClibc
based userland as of early June 2008. This is expected to change
soon as both incorporate more recent open source developments.
Signed-off-by: Marc Gauthier <marc@tensilica.com>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
Diffstat (limited to 'arch/xtensa/include/asm/regs.h')
| -rw-r--r-- | arch/xtensa/include/asm/regs.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/xtensa/include/asm/regs.h b/arch/xtensa/include/asm/regs.h index 8a8aa61..6aaf6d6 100644 --- a/arch/xtensa/include/asm/regs.h +++ b/arch/xtensa/include/asm/regs.h @@ -52,6 +52,10 @@ #define EXCCAUSE_SPECULATION 7 #define EXCCAUSE_PRIVILEGED 8 #define EXCCAUSE_UNALIGNED 9 +#define EXCCAUSE_INSTR_DATA_ERROR 12 +#define EXCCAUSE_LOAD_STORE_DATA_ERROR 13 +#define EXCCAUSE_INSTR_ADDR_ERROR 14 +#define EXCCAUSE_LOAD_STORE_ADDR_ERROR 15 #define EXCCAUSE_ITLB_MISS 16 #define EXCCAUSE_ITLB_MULTIHIT 17 #define EXCCAUSE_ITLB_PRIVILEGE 18 |
