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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-10-09 16:10:14 +0900 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-10-09 16:10:14 +0900 |
| commit | dea77ccdc93448d81e495a57bc1c1e97be4fdfe8 (patch) | |
| tree | a8b0ed4c01332efa9a00b9a810fa4a00b74e5630 /arch/blackfin/mach-common/cpufreq.c | |
| parent | de390bba797aa9a554bc1769b6a8771605854d79 (diff) | |
| parent | 6594b982f6d5f957c8d72de7658bf8e240c7dfca (diff) | |
| download | op-kernel-dev-dea77ccdc93448d81e495a57bc1c1e97be4fdfe8.zip op-kernel-dev-dea77ccdc93448d81e495a57bc1c1e97be4fdfe8.tar.gz | |
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lliubbo/blackfin
Pull blackfin update from Bob Liu.
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lliubbo/blackfin:
Blackfin: smp: add smp_mb() to keep coherency
Blackfin: drop irq enable in init_arch_irq()
Blackfin: fix wrong place disabled irq
Blackfin: update defconfig for bf609-ezkit
Blackfin: add bf548 v0.4 revision
Blackfin: bf60x: Add bf608 and bf609 specific perpheral MMRs
Blackfin: cpufreq: fix dpm_state_table
Blackfin: bfin_gpio: proc: fix return value
Blackfin: CM-BF537E: Update SPORT support in board file.
Blackfin: bf537: fix lq035 platform device name
Blackfin: bf533-ezkit: enable flash drivers by default
Diffstat (limited to 'arch/blackfin/mach-common/cpufreq.c')
| -rw-r--r-- | arch/blackfin/mach-common/cpufreq.c | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/arch/blackfin/mach-common/cpufreq.c b/arch/blackfin/mach-common/cpufreq.c index c854a27..d88bd31 100644 --- a/arch/blackfin/mach-common/cpufreq.c +++ b/arch/blackfin/mach-common/cpufreq.c @@ -77,15 +77,14 @@ static void __init bfin_init_tables(unsigned long cclk, unsigned long sclk) csel = bfin_read32(CGU0_DIV) & 0x1F; #endif - for (index = 0; (cclk >> index) >= min_cclk && csel <= 3; index++, csel++) { + for (index = 0; (cclk >> index) >= min_cclk && csel <= 3 && index < 3; index++, csel++) { bfin_freq_table[index].frequency = cclk >> index; #ifndef CONFIG_BF60x dpm_state_table[index].csel = csel << 4; /* Shift now into PLL_DIV bitpos */ - dpm_state_table[index].tscale = (TIME_SCALE / (1 << csel)) - 1; #else dpm_state_table[index].csel = csel; - dpm_state_table[index].tscale = TIME_SCALE >> index; #endif + dpm_state_table[index].tscale = (TIME_SCALE >> index) - 1; pr_debug("cpufreq: freq:%d csel:0x%x tscale:%d\n", bfin_freq_table[index].frequency, @@ -135,7 +134,7 @@ static int bfin_target(struct cpufreq_policy *poli, unsigned int plldiv; #endif unsigned int index, cpu; - unsigned long flags, cclk_hz; + unsigned long cclk_hz; struct cpufreq_freqs freqs; static unsigned long lpj_ref; static unsigned int lpj_ref_freq; @@ -166,7 +165,6 @@ static int bfin_target(struct cpufreq_policy *poli, cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); if (cpu == CPUFREQ_CPU) { - flags = hard_local_irq_save(); #ifndef CONFIG_BF60x plldiv = (bfin_read_PLL_DIV() & SSEL) | dpm_state_table[index].csel; @@ -195,7 +193,6 @@ static int bfin_target(struct cpufreq_policy *poli, loops_per_jiffy = cpufreq_scale(lpj_ref, lpj_ref_freq, freqs.new); } - hard_local_irq_restore(flags); } /* TODO: just test case for cycles clock source, remove later */ cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); |
