From 810f1512dc8a1f64c22229c3def85fc398b6a24f Mon Sep 17 00:00:00 2001 From: James Cosin Date: Mon, 20 Aug 2012 11:55:36 +0800 Subject: Blackfin: cpufreq: fix dpm_state_table This patch fixes an assumption that cclk's initial divisor will always be 1 (or 0 in the register). TSCALE is always initialized on startup with a value of 4 regardless of the inital cclk divisor; so, we can't make the assumption without making lots of other assumptions. The TPERIOD value is set with a value of the current cclk (value / (HZ * TSCALE)) - 1; so, we need to adjust based on this initial frequency and not use cclk's initial divisor for adjusting the tscale. Signed-off-by: Steven Miao Signed-off-by: Bob Liu --- arch/blackfin/mach-common/cpufreq.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'arch/blackfin/mach-common/cpufreq.c') diff --git a/arch/blackfin/mach-common/cpufreq.c b/arch/blackfin/mach-common/cpufreq.c index c854a27..65a4511 100644 --- a/arch/blackfin/mach-common/cpufreq.c +++ b/arch/blackfin/mach-common/cpufreq.c @@ -77,15 +77,14 @@ static void __init bfin_init_tables(unsigned long cclk, unsigned long sclk) csel = bfin_read32(CGU0_DIV) & 0x1F; #endif - for (index = 0; (cclk >> index) >= min_cclk && csel <= 3; index++, csel++) { + for (index = 0; (cclk >> index) >= min_cclk && csel <= 3 && index < 3; index++, csel++) { bfin_freq_table[index].frequency = cclk >> index; #ifndef CONFIG_BF60x dpm_state_table[index].csel = csel << 4; /* Shift now into PLL_DIV bitpos */ - dpm_state_table[index].tscale = (TIME_SCALE / (1 << csel)) - 1; #else dpm_state_table[index].csel = csel; - dpm_state_table[index].tscale = TIME_SCALE >> index; #endif + dpm_state_table[index].tscale = (TIME_SCALE >> index) - 1; pr_debug("cpufreq: freq:%d csel:0x%x tscale:%d\n", bfin_freq_table[index].frequency, -- cgit v1.1 From 5204e4787b89a281be88a2eb57407165da2757ad Mon Sep 17 00:00:00 2001 From: Steven Miao Date: Mon, 8 Oct 2012 14:18:34 +0800 Subject: Blackfin: fix wrong place disabled irq Shouldn't disable irq before send ipi. Signed-off-by: Steven Miao Signed-off-by: Bob Liu --- arch/blackfin/mach-common/cpufreq.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'arch/blackfin/mach-common/cpufreq.c') diff --git a/arch/blackfin/mach-common/cpufreq.c b/arch/blackfin/mach-common/cpufreq.c index 65a4511..d88bd31 100644 --- a/arch/blackfin/mach-common/cpufreq.c +++ b/arch/blackfin/mach-common/cpufreq.c @@ -134,7 +134,7 @@ static int bfin_target(struct cpufreq_policy *poli, unsigned int plldiv; #endif unsigned int index, cpu; - unsigned long flags, cclk_hz; + unsigned long cclk_hz; struct cpufreq_freqs freqs; static unsigned long lpj_ref; static unsigned int lpj_ref_freq; @@ -165,7 +165,6 @@ static int bfin_target(struct cpufreq_policy *poli, cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); if (cpu == CPUFREQ_CPU) { - flags = hard_local_irq_save(); #ifndef CONFIG_BF60x plldiv = (bfin_read_PLL_DIV() & SSEL) | dpm_state_table[index].csel; @@ -194,7 +193,6 @@ static int bfin_target(struct cpufreq_policy *poli, loops_per_jiffy = cpufreq_scale(lpj_ref, lpj_ref_freq, freqs.new); } - hard_local_irq_restore(flags); } /* TODO: just test case for cycles clock source, remove later */ cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); -- cgit v1.1