summaryrefslogtreecommitdiffstats
path: root/src/roms/u-boot/drivers/spi/altera_spi.c
blob: 5accbb5c22c1e88cd829078c7ad914584020e38d (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
/*
 * Altera SPI driver
 *
 * based on bfin_spi.c
 * Copyright (c) 2005-2008 Analog Devices Inc.
 * Copyright (C) 2010 Thomas Chou <thomas@wytron.com.tw>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */
#include <common.h>
#include <asm/io.h>
#include <malloc.h>
#include <spi.h>

#define ALTERA_SPI_RXDATA	0
#define ALTERA_SPI_TXDATA	4
#define ALTERA_SPI_STATUS	8
#define ALTERA_SPI_CONTROL	12
#define ALTERA_SPI_SLAVE_SEL	20

#define ALTERA_SPI_STATUS_ROE_MSK	(0x8)
#define ALTERA_SPI_STATUS_TOE_MSK	(0x10)
#define ALTERA_SPI_STATUS_TMT_MSK	(0x20)
#define ALTERA_SPI_STATUS_TRDY_MSK	(0x40)
#define ALTERA_SPI_STATUS_RRDY_MSK	(0x80)
#define ALTERA_SPI_STATUS_E_MSK	(0x100)

#define ALTERA_SPI_CONTROL_IROE_MSK	(0x8)
#define ALTERA_SPI_CONTROL_ITOE_MSK	(0x10)
#define ALTERA_SPI_CONTROL_ITRDY_MSK	(0x40)
#define ALTERA_SPI_CONTROL_IRRDY_MSK	(0x80)
#define ALTERA_SPI_CONTROL_IE_MSK	(0x100)
#define ALTERA_SPI_CONTROL_SSO_MSK	(0x400)

#ifndef CONFIG_SYS_ALTERA_SPI_LIST
#define CONFIG_SYS_ALTERA_SPI_LIST { CONFIG_SYS_SPI_BASE }
#endif

static ulong altera_spi_base_list[] = CONFIG_SYS_ALTERA_SPI_LIST;

struct altera_spi_slave {
	struct spi_slave slave;
	ulong base;
};
#define to_altera_spi_slave(s) container_of(s, struct altera_spi_slave, slave)

__attribute__((weak))
int spi_cs_is_valid(unsigned int bus, unsigned int cs)
{
	return bus < ARRAY_SIZE(altera_spi_base_list) && cs < 32;
}

__attribute__((weak))
void spi_cs_activate(struct spi_slave *slave)
{
	struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
	writel(1 << slave->cs, altspi->base + ALTERA_SPI_SLAVE_SEL);
	writel(ALTERA_SPI_CONTROL_SSO_MSK, altspi->base + ALTERA_SPI_CONTROL);
}

__attribute__((weak))
void spi_cs_deactivate(struct spi_slave *slave)
{
	struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
	writel(0, altspi->base + ALTERA_SPI_CONTROL);
	writel(0, altspi->base + ALTERA_SPI_SLAVE_SEL);
}

void spi_init(void)
{
}

void spi_set_speed(struct spi_slave *slave, uint hz)
{
	/* altera spi core does not support programmable speed */
}

struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
				  unsigned int max_hz, unsigned int mode)
{
	struct altera_spi_slave *altspi;

	if (!spi_cs_is_valid(bus, cs))
		return NULL;

	altspi = spi_alloc_slave(struct altera_spi_slave, bus, cs);
	if (!altspi)
		return NULL;

	altspi->base = altera_spi_base_list[bus];
	debug("%s: bus:%i cs:%i base:%lx\n", __func__,
		bus, cs, altspi->base);

	return &altspi->slave;
}

void spi_free_slave(struct spi_slave *slave)
{
	struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
	free(altspi);
}

int spi_claim_bus(struct spi_slave *slave)
{
	struct altera_spi_slave *altspi = to_altera_spi_slave(slave);

	debug("%s: bus:%i cs:%i\n", __func__, slave->bus, slave->cs);
	writel(0, altspi->base + ALTERA_SPI_CONTROL);
	writel(0, altspi->base + ALTERA_SPI_SLAVE_SEL);
	return 0;
}

void spi_release_bus(struct spi_slave *slave)
{
	struct altera_spi_slave *altspi = to_altera_spi_slave(slave);

	debug("%s: bus:%i cs:%i\n", __func__, slave->bus, slave->cs);
	writel(0, altspi->base + ALTERA_SPI_SLAVE_SEL);
}

#ifndef CONFIG_ALTERA_SPI_IDLE_VAL
# define CONFIG_ALTERA_SPI_IDLE_VAL 0xff
#endif

int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
	     void *din, unsigned long flags)
{
	struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
	/* assume spi core configured to do 8 bit transfers */
	uint bytes = bitlen / 8;
	const uchar *txp = dout;
	uchar *rxp = din;

	debug("%s: bus:%i cs:%i bitlen:%i bytes:%i flags:%lx\n", __func__,
		slave->bus, slave->cs, bitlen, bytes, flags);
	if (bitlen == 0)
		goto done;

	if (bitlen % 8) {
		flags |= SPI_XFER_END;
		goto done;
	}

	/* empty read buffer */
	if (readl(altspi->base + ALTERA_SPI_STATUS) &
	    ALTERA_SPI_STATUS_RRDY_MSK)
		readl(altspi->base + ALTERA_SPI_RXDATA);
	if (flags & SPI_XFER_BEGIN)
		spi_cs_activate(slave);

	while (bytes--) {
		uchar d = txp ? *txp++ : CONFIG_ALTERA_SPI_IDLE_VAL;
		debug("%s: tx:%x ", __func__, d);
		writel(d, altspi->base + ALTERA_SPI_TXDATA);
		while (!(readl(altspi->base + ALTERA_SPI_STATUS) &
			 ALTERA_SPI_STATUS_RRDY_MSK))
			;
		d = readl(altspi->base + ALTERA_SPI_RXDATA);
		if (rxp)
			*rxp++ = d;
		debug("rx:%x\n", d);
	}
 done:
	if (flags & SPI_XFER_END)
		spi_cs_deactivate(slave);

	return 0;
}
OpenPOWER on IntegriCloud