index
:
hqemu
2.5.1_overlay
2.5_overlay
2.6_overlay
master
HQEMU
Raptor Engineering, LLC
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
path:
root
/
target-sparc
/
op_helper.c
Commit message (
Expand
)
Author
Age
Files
Lines
*
Allow NWINDOWS selection (CPU feature with model specific defaults)
blueswir1
2008-06-07
1
-12
/
+12
*
Remove unused (for now) reg_REGWPTR (original patch by Glauber Costa)
blueswir1
2008-05-29
1
-1
/
+0
*
Move non-op functions from op_helper.c to helper.c and vice versa.
blueswir1
2008-05-27
1
-234
/
+13
*
Fix off-by-one unwinding error.
pbrook
2008-05-25
1
-6
/
+0
*
Remove currently unnecessary alignment masking
blueswir1
2008-05-20
1
-57
/
+57
*
Wrap long lines
blueswir1
2008-05-12
1
-44
/
+84
*
Remove someexplicit alignment checks (initial patch by Fabrice Bellard)
blueswir1
2008-05-11
1
-54
/
+80
*
suppressed fixed registers
bellard
2008-05-10
1
-28
/
+1
*
Fix compiler warnings
blueswir1
2008-05-10
1
-3
/
+3
*
CPU feature selection support
blueswir1
2008-05-09
1
-47
/
+56
*
Move #include to speed up compilation
blueswir1
2008-05-09
1
-0
/
+3
*
Complete the TCG conversion
blueswir1
2008-05-04
1
-0
/
+103
*
Revert the previous patch
blueswir1
2008-04-22
1
-0
/
+108
*
Move 128-bit float emulation under linux-user
blueswir1
2008-04-22
1
-108
/
+0
*
Convert align checks to TCG
blueswir1
2008-03-21
1
-0
/
+6
*
Convert save, restore, saved, restored, and flushw to TCG
blueswir1
2008-03-21
1
-0
/
+92
*
Convert other float and VIS ops to TCG
blueswir1
2008-03-21
1
-34
/
+614
*
Convert udiv and sdiv ops to TCG
blueswir1
2008-03-18
1
-0
/
+44
*
Convert CCR and CWP ops to TCG
blueswir1
2008-03-18
1
-0
/
+21
*
Convert array8/16/32 and alignaddr to TCG
blueswir1
2008-03-18
1
-0
/
+31
*
Convert ldfsr and stfsr to TCG
blueswir1
2008-03-15
1
-1
/
+8
*
Convert Sparc64 trap state ops to TCG
blueswir1
2008-03-05
1
-17
/
+21
*
Convert float helpers to TCG, fix fabsq in the process
blueswir1
2008-03-04
1
-22
/
+13
*
Modify Sparc32/64 to use TCG
blueswir1
2008-02-24
1
-280
/
+318
*
Sparc32 MMU register fixes (Robert Reif)
blueswir1
2008-02-11
1
-8
/
+14
*
More ASIs
blueswir1
2008-01-01
1
-6
/
+18
*
Nicer debug output for exceptions
blueswir1
2007-12-30
1
-4
/
+104
*
Initial support for Sun4d machines (SS-1000, SS-2000)
blueswir1
2007-12-28
1
-3
/
+1
*
Improved ASI debugging (Robert Reif)
blueswir1
2007-12-28
1
-14
/
+58
*
Add ASIs (Robert Reif)
blueswir1
2007-12-10
1
-1
/
+8
*
Fix compilation and warnings on PPC host
blueswir1
2007-11-28
1
-0
/
+17
*
128-bit float support for user mode
blueswir1
2007-11-25
1
-0
/
+39
*
More MMU registers (Robert Reif)
blueswir1
2007-11-25
1
-6
/
+17
*
Fix MXCC register 64 bit read word order (Robert Reif)
blueswir1
2007-11-19
1
-4
/
+4
*
Break up vl.h.
pbrook
2007-11-17
1
-24
/
+0
*
Remove unnecessary register masking (Robert Reif)
blueswir1
2007-11-17
1
-5
/
+5
*
Fix MXCC error register (Robert Reif)
blueswir1
2007-11-17
1
-4
/
+2
*
Add MXCC module reset register (Robert Reif)
blueswir1
2007-11-17
1
-0
/
+8
*
removed warning
bellard
2007-11-11
1
-1
/
+1
*
CPU specific boot mode (Robert Reif)
blueswir1
2007-11-07
1
-2
/
+2
*
Adjust s390 addresses (the MSB is defined as "to be ignored").
ths
2007-10-29
1
-1
/
+5
*
Use shared ctpop64 helper
blueswir1
2007-10-28
1
-6
/
+2
*
Avoid gcc warnings
blueswir1
2007-10-20
1
-2
/
+2
*
Fix compiling Sparc64 on PPC host
blueswir1
2007-10-20
1
-0
/
+15
*
Use ldq and stq for 8 byte accesses (original patch by Robert Reif)
blueswir1
2007-10-17
1
-21
/
+22
*
Fix bug in Sparc32 sta op (Robert Reif)
blueswir1
2007-10-14
1
-1
/
+1
*
Sparc64 hypervisor mode
blueswir1
2007-10-14
1
-30
/
+68
*
SuperSparc MXCC support (Robert Reif)
blueswir1
2007-10-14
1
-16
/
+151
*
Replace is_user variable with mmu_idx in softmmu core,
j_mayer
2007-10-14
1
-2
/
+2
*
Fix block load ASIs
blueswir1
2007-10-01
1
-9
/
+25
[next]