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* exec.h cleanupBlue Swirl2011-07-302-34/+3
* Remove exec-all.h include directivesBlue Swirl2011-06-263-3/+0
* Move cpu_has_work and cpu_pc_from_tb to cpu.hBlue Swirl2011-06-262-11/+13
* exec.h: fix coding style and change cpu_has_work to return boolBlue Swirl2011-06-261-2/+2
* cpu_loop_exit: avoid using AREG0Blue Swirl2011-06-261-5/+5
* Remove unused function parameter from cpu_restore_stateStefan Weil2011-04-201-1/+1
* Remove unused function parameters from gen_pc_load and rename the functionStefan Weil2011-04-201-2/+1
* target-sh4: get rid of CPU_{Float,Double}UAurelien Jarno2011-04-122-158/+92
* Fix conversions from pointer to tcg_target_longStefan Weil2011-04-101-1/+1
* inline cpu_halted into sole callerPaolo Bonzini2011-03-131-10/+0
* target-sh4: move intr_at_halt out of cpu_halted()Aurelien Jarno2011-03-034-4/+4
* target-sh4: fix negcAurelien Jarno2011-02-041-2/+2
* target-sh4: update PTEH upon MMU exceptionAlexandre Courbot2011-01-261-0/+4
* sh4: implement missing mmaped TLB read functionsAurelien Jarno2011-01-262-0/+82
* sh4: implement missing mmaped TLB write functionsAurelien Jarno2011-01-262-3/+67
* target-sh4: fix index of address read error exceptionAlexandre Courbot2011-01-251-1/+1
* target-sh4: fix TLB invalidation codeAlexandre Courbot2011-01-251-2/+2
* target-sh4: implement negc using TCGAurelien Jarno2011-01-163-17/+15
* target-sh4: use rotl/rotr when possibleAurelien Jarno2011-01-161-5/+3
* target-sh4: correct use of ! and &Aurelien Jarno2011-01-151-2/+2
* target-sh4: use setcond when possibleAurelien Jarno2011-01-141-29/+27
* target-sh4: log instructions start in TCG codeAurelien Jarno2011-01-141-0/+4
* target-sh4: simplify comparisons after a 'and' opAurelien Jarno2011-01-141-3/+3
* target-sh4: fix reset on r2dAurelien Jarno2011-01-142-18/+16
* target-sh4: optimize exceptionsAurelien Jarno2011-01-142-15/+12
* target-sh4: add ftrv instructionAurelien Jarno2011-01-143-0/+38
* target-sh4: add fipr instructionAurelien Jarno2011-01-143-0/+33
* target-sh4: implement FPU exceptionsAurelien Jarno2011-01-141-22/+136
* target-sh4: implement flush-to-zeroAurelien Jarno2011-01-142-0/+2
* target-sh4: define FPSCR constantsAurelien Jarno2011-01-143-9/+37
* target-sh4: use default-NaN modeAurelien Jarno2011-01-141-0/+1
* target-sh4: fix fpu disabled/illegal exceptionAurelien Jarno2011-01-111-10/+18
* target-sh4: improve TLBAurelien Jarno2011-01-101-21/+44
* target-sh4: implement writes to mmaped ITLBAurelien Jarno2011-01-092-0/+21
* target-xxx: Use fprintf_function (format checking)Stefan Weil2010-10-302-2/+3
* target-sh4: Add support for ldc & stc with sgrAlexandre Courbot2010-07-121-0/+2
* target-sh4: Split the LDST macro into 2 sub-macrosAlexandre Courbot2010-07-121-2/+6
* remove exec-all.h inclusion from cpu.hPaolo Bonzini2010-07-031-1/+0
* move cpu_pc_from_tb to target-*/exec.hPaolo Bonzini2010-07-032-6/+6
* target-sh4: Remove duplicate CPU log.Richard Henderson2010-05-051-6/+0
* remove TARGET_* defines from translate-all.cPaolo Bonzini2010-04-081-0/+2
* Replace assert(0) with abort() or cpu_abort()Blue Swirl2010-03-183-5/+5
* Large page TLB flushPaul Brook2010-03-171-1/+2
* Target specific usermode cleanupPaul Brook2010-03-121-0/+2
* Remove cpu_get_phys_page_debug from userspace emulationPaul Brook2010-03-121-5/+0
* Move TARGET_PHYS_ADDR_SPACE_BITS to target-*/cpu.h.Richard Henderson2010-03-121-0/+3
* Fix incorrect exception_index useBlue Swirl2010-02-141-1/+1
* target-sh4: MMU: separate execute and read/write permissionsAurelien Jarno2010-02-091-21/+6
* target-sh4: MMU: fix store queue addressesAurelien Jarno2010-02-091-1/+1
* target-sh4: MMU: remove dead codeAurelien Jarno2010-02-091-18/+0
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