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* target-sh4: improve shad instructionAurelien Jarno2015-09-131-31/+22
* target-sh4: improve shld instructionAurelien Jarno2015-09-131-26/+22
* target-sh4: improve cmp/str instructionAurelien Jarno2015-09-131-12/+5
* target-sh4: use deposit in swap.b instructionAurelien Jarno2015-09-131-6/+2
* tcg: Remove tcg_gen_trunc_i64_i32Richard Henderson2015-08-241-2/+2
* disas: Remove uses of CPU envPeter Crosthwaite2015-06-221-1/+1
* target-sh4: remove dead codeAurelien Jarno2015-06-121-1/+0
* target-sh4: factorize fmov implementationAurelien Jarno2015-06-121-9/+4
* target-sh4: split out Q and M from of SR and optimize div1Aurelien Jarno2015-06-121-28/+60
* target-sh4: optimize negc using add2 and sub2Aurelien Jarno2015-06-121-6/+6
* target-sh4: optimize subc using sub2Aurelien Jarno2015-06-121-11/+7
* target-sh4: optimize addc using add2Aurelien Jarno2015-06-121-7/+4
* target-sh4: Split out T from SRAurelien Jarno2015-06-121-124/+89
* target-sh4: use bit number for SR constantsAurelien Jarno2015-06-121-36/+39
* tcg: Change translator-side labels to a pointerRichard Henderson2015-03-131-11/+11
* tcg: Introduce tcg_op_buf_count and tcg_op_buf_fullRichard Henderson2015-02-121-5/+3
* tcg: Move emit of INDEX_op_end into gen_tb_endRichard Henderson2015-02-121-1/+1
* gen-icount: check cflags instead of use_icount globalPaolo Bonzini2015-01-031-1/+1
* trace: [tcg] Include TCG-tracing header on all targetsLluís Vilanova2014-08-121-0/+3
* softmmu: introduce cpu_ldst.hPaolo Bonzini2014-06-051-0/+1
* tcg: Invert the inclusion of helper.hRichard Henderson2014-05-281-3/+2
* cpu: Move breakpoints field from CPU_COMMON to CPUStateAndreas Färber2014-03-131-2/+2
* target-sh4: Use new qemu_ld/st opcodesAurelien Jarno2013-12-211-77/+90
* tcg: Move helper registration into tcg_context_initRichard Henderson2013-10-101-4/+0
* tcg: Change tcg_gen_exit_tb argument to uintptr_tRichard Henderson2013-09-021-1/+1
* cpu: Move singlestep_enabled field from CPU_COMMON to CPUStateAndreas Färber2013-07-231-3/+5
* target-sh4: Change gen_intermediate_code_internal() argument to SuperHCPUAndreas Färber2013-07-091-4/+5
* cpu: Turn cpu_dump_{state,statistics}() into CPUState hooksAndreas Färber2013-06-281-3/+4
* target-sh4: Introduce SuperHCPU subclassesAndreas Färber2013-03-121-84/+0
* gen-icount.h: Rename gen_icount_start/end to gen_tb_start/endPeter Maydell2013-03-031-2/+2
* target-sh4: Use mul*2 for dmul*Richard Henderson2013-02-231-28/+2
* target-sh4: Move TCG initialization to SuperHCPU initfnAndreas Färber2013-02-161-2/+1
* target-sh4: Introduce QOM realizefn for SuperHCPUAndreas Färber2013-02-161-2/+3
* exec: move include files to include/exec/Paolo Bonzini2012-12-191-1/+1
* build: kill libdis, move disassemblers to disas/Paolo Bonzini2012-12-191-1/+1
* TCG: Use gen_opc_instr_start from context instead of global variable.Evgeny Voevodin2012-12-081-3/+3
* TCG: Use gen_opc_icount from context instead of global variable.Evgeny Voevodin2012-12-081-1/+1
* TCG: Use gen_opc_pc from context instead of global variable.Evgeny Voevodin2012-12-081-2/+2
* TCG: Use gen_opc_buf from context instead of global variable.Evgeny Voevodin2012-11-171-3/+3
* TCG: Use gen_opc_ptr from context instead of global variable.Evgeny Voevodin2012-11-171-4/+4
* disas: avoid using cpu_single_envBlue Swirl2012-11-101-1/+1
* Emit debug_insn for CPU_LOG_TB_OP_OPT as well.Richard Henderson2012-09-271-1/+1
* target-sh4: remove useless codeAurelien Jarno2012-09-211-4/+0
* target-sh4: cleanup DisasContextAurelien Jarno2012-09-211-30/+26
* target-sh4: rework exceptions handlingAurelien Jarno2012-09-211-6/+12
* target-sh4: remove gen_clr_t() and gen_set_t()Aurelien Jarno2012-09-211-13/+3
* target-sh4: optimize swap.wAurelien Jarno2012-09-211-11/+1
* target-sh4: optimize xtrctAurelien Jarno2012-09-211-1/+0
* target-sh4: implement addv and subv using TCGAurelien Jarno2012-09-211-2/+34
* target-sh4: implement addc and subc using TCGAurelien Jarno2012-09-211-2/+36
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