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path: root/target-sh4/cpu.h
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* target-sh4: move features flag after CPU_COMMONBobby Bingham2013-12-091-3/+3
* cpu: Introduce CPUClass::synchronize_from_tb() for cpu_pc_from_tb()Andreas Färber2013-07-231-6/+0
* linux-user: Move cpu_clone_regs() and cpu_set_tls() into linux-userPeter Maydell2013-07-091-14/+0
* cpu: Replace do_interrupt() by CPUClass::do_interrupt methodAndreas Färber2013-03-121-1/+0
* cpu: Move halted and interrupt_request fields to CPUStateAndreas Färber2013-03-121-3/+1
* target-sh4: Move PVR/PRR/CVR into SuperHCPUClassAndreas Färber2013-03-121-3/+0
* target-sh4: Move TCG initialization to SuperHCPU initfnAndreas Färber2013-02-161-0/+1
* fpu: move public header file to include/fpuPaolo Bonzini2012-12-191-3/+1
* exec: move include files to include/exec/Paolo Bonzini2012-12-191-3/+3
* cpus: Pass CPUState to [qemu_]cpu_has_work()Andreas Färber2012-10-311-1/+3
* Rename target_phys_addr_t to hwaddrAvi Kivity2012-10-231-8/+8
* target-sh4: Let cpu_sh4_init() return SuperHCPUAndreas Färber2012-06-041-2/+10
* target-sh4: QOM'ify CPUAndreas Färber2012-04-301-0/+2
* Rename CPUState -> CPUArchStateAndreas Färber2012-03-141-1/+1
* target-sh4: Don't overuse CPUStateAndreas Färber2012-03-141-5/+5
* Remove unused is_softmmu parameter from cpu_handle_mmu_faultBlue Swirl2011-08-071-1/+1
* Move cpu_has_work and cpu_pc_from_tb to cpu.hBlue Swirl2011-06-261-0/+13
* target-sh4: move intr_at_halt out of cpu_halted()Aurelien Jarno2011-03-031-1/+1
* sh4: implement missing mmaped TLB read functionsAurelien Jarno2011-01-261-0/+8
* sh4: implement missing mmaped TLB write functionsAurelien Jarno2011-01-261-2/+6
* target-sh4: fix reset on r2dAurelien Jarno2011-01-141-6/+8
* target-sh4: define FPSCR constantsAurelien Jarno2011-01-141-4/+31
* target-sh4: implement writes to mmaped ITLBAurelien Jarno2011-01-091-0/+2
* target-xxx: Use fprintf_function (format checking)Stefan Weil2010-10-301-1/+2
* remove exec-all.h inclusion from cpu.hPaolo Bonzini2010-07-031-1/+0
* move cpu_pc_from_tb to target-*/exec.hPaolo Bonzini2010-07-031-6/+0
* Target specific usermode cleanupPaul Brook2010-03-121-0/+2
* Move TARGET_PHYS_ADDR_SPACE_BITS to target-*/cpu.h.Richard Henderson2010-03-121-0/+3
* target-sh4: MMU: reduce the size of a TLB entryAurelien Jarno2010-02-091-12/+11
* sh7750: handle MMUCR TI bitAurelien Jarno2010-02-091-0/+2
* Revert "Get rid of _t suffix"Anthony Liguori2009-10-011-1/+1
* Get rid of _t suffixmalc2009-10-011-1/+1
* cleanup cpu-exec.c, part 0/N: consolidate handle_cpu_signalNathan Froyd2009-08-241-0/+1
* Update to a hopefully more future proof FSF addressBlue Swirl2009-07-161-2/+1
* SH: Improve movca.l/ocbi emulation.edgar_igl2009-04-011-1/+14
* The _exit syscall is used for both thread termination in NPTL applications,pbrook2009-03-071-1/+2
* clean build: Fix remaining sh4 warningsaurel322009-03-031-0/+2
* SH: Implement MOVCO.L and MOVLI.Laurel322009-03-021-0/+2
* SH7750/51: add register BCR3, BCR4, PCR, RTCOR, RTCNT, RTCSR, SDMR2, SDMR3 an...aurel322009-02-071-0/+1
* Update FSF address in GPL/LGPL boilerplateaurel322009-01-041-1/+1
* target-sh4: make the initial value of SR easier to readaurel322008-12-131-0/+4
* target-sh4: add prefi, icbi, syncoaurel322008-12-131-0/+7
* target-sh4: add SH7785 as CPU optionaurel322008-12-131-0/+1
* target-sh4: remove 2 warningsaurel322008-12-111-0/+4
* SH4: Implement FD bitaurel322008-12-071-1/+2
* Refactor translation block CPU state handling (Jan Kiszka)aliguori2008-11-181-0/+11
* Convert CPU_PC_FROM_TB to static inline (Jan Kiszka)aliguori2008-11-181-5/+7
* qemu sh4 nptl supportaurel322008-09-151-0/+5
* sh4: CPU versioning.aurel322008-09-021-0/+17
* SH4: Remove dyngen leftoversaurel322008-09-011-3/+1
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