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path: root/target-openrisc/translate.c
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* target-*: Advance pc after recognizing a breakpointRichard Henderson2015-10-281-0/+5
* tcg: Remove gen_intermediate_code_pcRichard Henderson2015-10-071-38/+4
* tcg: Pass data argument to restore_state_to_opcRichard Henderson2015-10-071-2/+2
* tcg: Add TCG_MAX_INSNSRichard Henderson2015-10-071-0/+3
* target-*: Introduce and use cpu_breakpoint_testRichard Henderson2015-10-071-17/+7
* target-*: Increment num_insns immediately after tcg_gen_insn_startRichard Henderson2015-10-071-2/+2
* target-*: Unconditionally emit tcg_gen_insn_startRichard Henderson2015-10-071-4/+1
* tcg: Rename debug_insn_start to insn_startRichard Henderson2015-10-071-1/+1
* tlb: Add "ifetch" argument to cpu_mmu_index()Benjamin Herrenschmidt2015-09-111-1/+1
* tcg: Remove tcg_gen_trunc_i64_i32Richard Henderson2015-08-241-11/+11
* disas: Remove uses of CPU envPeter Crosthwaite2015-06-221-1/+1
* tcg: Change translator-side labels to a pointerRichard Henderson2015-03-131-18/+16
* tcg: Introduce tcg_op_buf_count and tcg_op_buf_fullRichard Henderson2015-02-121-8/+5
* tcg: Move emit of INDEX_op_end into gen_tb_endRichard Henderson2015-02-121-1/+1
* target-openrisc: bugfix for dec_sys to decode instructions correctlyDavid Morrison2015-01-151-1/+1
* gen-icount: check cflags instead of use_icount globalPaolo Bonzini2015-01-031-1/+1
* trace: [tcg] Include TCG-tracing header on all targetsLluís Vilanova2014-08-121-0/+3
* openrisc: fix commentMichael S. Tsirkin2014-06-291-2/+2
* softmmu: introduce cpu_ldst.hPaolo Bonzini2014-06-051-0/+1
* tcg: Invert the inclusion of helper.hRichard Henderson2014-05-281-3/+2
* cpu: Move breakpoints field from CPU_COMMON to CPUStateAndreas Färber2014-03-131-2/+3
* target-openrisc: Use new qemu_ld/st opcodesRichard Henderson2014-02-121-67/+32
* openrisc: Fix spelling in comment (transaltion -> translation)Stefan Weil2013-12-231-1/+1
* target-openrisc: Remove unnecessary code generated by jump instructionsSebastian Macke2013-11-201-19/+26
* target-openrisc: Speed up move instructionSebastian Macke2013-11-201-23/+27
* tcg: Move helper registration into tcg_context_initRichard Henderson2013-10-101-2/+0
* tcg: Change tcg_gen_exit_tb argument to uintptr_tRichard Henderson2013-09-021-1/+1
* cpu: Move singlestep_enabled field from CPU_COMMON to CPUStateAndreas Färber2013-07-231-3/+4
* log: Change log_cpu_state[_mask]() argument to CPUStateAndreas Färber2013-07-091-1/+1
* cpu: Turn cpu_dump_{state,statistics}() into CPUState hooksAndreas Färber2013-06-281-5/+7
* gen-icount.h: Rename gen_icount_start/end to gen_tb_start/endPeter Maydell2013-03-031-2/+2
* qemu-log: Remove qemu_log_try_set_file() and its usersPeter Maydell2013-02-231-2/+0
* misc: move include files to include/qemu/Paolo Bonzini2012-12-191-2/+2
* exec: move include files to include/exec/Paolo Bonzini2012-12-191-2/+2
* build: kill libdis, move disassemblers to disas/Paolo Bonzini2012-12-191-1/+1
* TCG: Use gen_opc_instr_start from context instead of global variable.Evgeny Voevodin2012-12-081-3/+3
* TCG: Use gen_opc_icount from context instead of global variable.Evgeny Voevodin2012-12-081-1/+1
* TCG: Use gen_opc_pc from context instead of global variable.Evgeny Voevodin2012-12-081-2/+2
* TCG: Use gen_opc_buf from context instead of global variable.Evgeny Voevodin2012-11-171-4/+5
* TCG: Use gen_opc_ptr from context instead of global variable.Evgeny Voevodin2012-11-171-5/+5
* disas: avoid using cpu_single_envBlue Swirl2012-11-101-1/+1
* Emit debug_insn for CPU_LOG_TB_OP_OPT as well.Richard Henderson2012-09-271-1/+1
* target-or32: Add system instructionsJia Liu2012-07-271-0/+26
* target-or32: Add instruction translationJia Liu2012-07-271-0/+1734
* target-or32: Add target stubs and QOM cpuJia Liu2012-07-271-0/+75
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