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* The 24k wants more watch and srsmap registers.ths2007-05-231-247/+31
* The previous patch to make breakpoints work was a performanceths2007-05-231-22/+7
* Catch more MIPS FPU cornercases, fix addr.ps and mulr.ps instructions.ths2007-05-201-8/+8
* Fix indexed FP load/store instructions.ths2007-05-201-17/+28
* More MIPS 64-bit FPU support.ths2007-05-191-37/+179
* Fix slti/sltiu for MIPS64, by Aurelien Jarno.ths2007-05-191-2/+2
* Fix ldl/ldr implementation, by Aurelien Jarno.ths2007-05-191-0/+2
* - Move FPU exception handling into helper functions, since they are big.ths2007-05-181-101/+75
* Work around the lack of proper handling for self-modifying code.ths2007-05-181-2/+20
* Fix mfc0 and dmtc0 instructions on MIPS64, by Aurelien Jarno.ths2007-05-131-57/+57
* Don't decode CP0 XContext on 32bit MIPS.ths2007-05-131-4/+8
* MIPS TLB style selection at runtime, by Herve Poussineau.ths2007-05-131-9/+16
* Implemented cabs FP instructions, and improve exception handling forths2007-05-111-40/+83
* Another bit of nicer debug output.ths2007-05-111-1/+1
* Implement FP madd/msub, wire up bc1any[24][ft].ths2007-05-111-12/+85
* Improved debug output for the MIPS opcode decoder.ths2007-05-111-85/+77
* Fix for the scd instruction, by Aurelien Jarno.ths2007-05-101-0/+1
* Fix MIPS64 address computation specialcase, by Aurelien Jarno.ths2007-05-091-2/+2
* MIPS 64-bit FPU support, plus some collateral bugfixes in theths2007-05-071-243/+824
* Next attempt to get the lui sign extension right.ths2007-04-251-2/+1
* Fix lui sign extension.ths2007-04-251-1/+1
* Choose number of TLBs at runtime, by Herve Poussineau.ths2007-04-171-4/+0
* Simplify branch likely handling.ths2007-04-161-6/+8
* Don't use T2 for INS, it conflicts with branch delay slot handling.ths2007-04-151-4/+4
* Small code generation optimization.ths2007-04-151-3/+6
* Restart interrupts after an exception.ths2007-04-141-8/+19
* Make SYNCI_Step and CCRes CPU-specific.ths2007-04-111-3/+0
* Throw RI for invalid MFMC0-class instructions. Introduce optionalths2007-04-111-3/+13
* Code formatting fix.ths2007-04-111-935/+938
* More Context/Xcontext fixes. Ifdef some 64bit-only ops, they mayths2007-04-111-1/+5
* Fix CP0_IntCtl handling.ths2007-04-091-0/+3
* Mark watchpoint features as unimplemented.ths2007-04-091-0/+1
* Catch unaligned sc/scd.ths2007-04-091-0/+2
* Fix exception handling cornercase for rdhwr.ths2007-04-091-11/+5
* Remove bogus mtc0 handling.ths2007-04-091-10/+0
* Implement prefx.ths2007-04-071-1/+41
* Set proper BadVAddress value for unaligned instruction fetch.ths2007-04-071-1/+2
* Actually skip over delay slot for a non-taken branch likely.ths2007-04-071-2/+2
* Save state for all CP0 instructions, they may throw a CPU exception.ths2007-04-061-0/+1
* fix branch delay slot cornercases.ths2007-04-051-2/+5
* Fix rotr immediate ops, mask shift/rotate arguments to their allowedths2007-04-051-33/+93
* Fix RDHWR handling. Code formatting. Don't use *_direct versions to raiseths2007-04-051-73/+82
* Fix code formatting.ths2007-04-041-66/+66
* MIPS32R2 needs RDPGPR/WRPGPR instructions even when no shadow registersths2007-04-021-2/+9
* Actually enable 64bit configuration.ths2007-04-011-17/+17
* Sanitize mips exception handling.ths2007-03-301-19/+3
* Fix enough FPU/R2 support to get 24Kf going.ths2007-03-231-23/+43
* Move mips CPU specific initialization to translate_init.c.ths2007-03-211-3/+0
* Barf on branches/jumps in branch delay slots. Spotted by Stefan Weil.ths2007-03-191-5/+13
* Define gen_intermediate_code_internal as "static inline".ths2007-03-191-2/+3
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