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* Delete obsolete file.ths2008-06-201-21/+0
* Convert unaligned load/store to TCG.ths2008-06-201-26/+0
* Convert vr54xx multiply instructions to TCG.ths2008-06-201-223/+0
* Remove now-dead code.ths2008-06-191-27/+0
* Convert remaining MIPS FP instructions to TCG.ths2008-06-191-292/+0
* Switch the standard multiplication instructions to TCG.ths2008-06-121-74/+0
* Switch bitfield instructions and assorted special ops to TCG.ths2008-06-121-150/+0
* TCGify the simplest FP instructions.ths2008-06-121-27/+0
* TCGify a few more instructions.ths2008-06-121-76/+0
* Call most FP helpers without deroute through op.cths2008-06-111-210/+0
* Switch most MIPS FP load/stores to TCG.ths2008-06-111-139/+0
* Switch remaining CP0 instructions to TCG or helper functions.ths2008-06-091-954/+0
* Fix mov[tf].ps handling for MIPS, by Richard Sandiford.ths2008-05-241-4/+6
* Swithc some MIPS CP0 accesses to TCG.ths2008-05-231-354/+0
* Switch MIPS movf/movt to TCG.ths2008-05-231-15/+0
* Delete dead code.ths2008-05-221-4/+0
* Switch MIPS branch handling to TCG, and clean out pointless wrapperths2008-05-221-56/+0
* Switch MIPS clo/clz and the condition tests to TCG.ths2008-05-211-68/+0
* Switch MIPS movn/movz to TCG.ths2008-05-211-14/+0
* Switch most MIPS logical and arithmetic instructions to TCG.ths2008-05-181-440/+0
* Delete obsolete MIPS dyngen ops.ths2008-05-071-98/+0
* Convert some MIPS load/store instructions to TCG.ths2008-05-061-24/+0
* Simplify mips branch handling. Retire T2 from use. Use TCG for branches.ths2008-05-041-35/+5
* Fix MIPS MT GPR accesses, thanks Stefan Weil.ths2008-05-031-8/+8
* Make MIPS MT implementation more cache friendly.ths2008-02-121-22/+22
* use the TCG code generatorbellard2008-02-011-18/+0
* Support for VR5432, and some of its special instructions. Original patchths2007-12-251-0/+182
* Improved PABITS handling, and config register fixes.ths2007-12-251-3/+3
* Fix MIPS64 R2 instructions.ths2007-11-181-15/+14
* Fix int/float inconsistencies.pbrook2007-11-171-4/+4
* Use FORCE_RET, scrap RETURN which was implemented in target-specific code.ths2007-11-091-371/+371
* Clean out the N32 macros from target-mips, and introduce MIPS ABI specificths2007-11-081-12/+12
* Restrict CP0_PerfCnt to legal values.ths2007-10-291-1/+1
* Implement missing MIPS supervisor mode bits.ths2007-10-281-3/+7
* Add sharable clz/clo inline functions and use them for the mips target.ths2007-10-271-49/+18
* The other half of the mul64 rework. Sorry for the breakage, I committedths2007-10-261-2/+2
* Force proper sign extension for mfc0/mfhc0 on MIPS64.ths2007-10-241-2/+2
* Fix writable length of the index register.ths2007-10-231-1/+8
* Fix CLO calculation for MIPS64. And a small code cleanup.ths2007-10-231-5/+5
* Use always_inline in the MIPS support where applicable.ths2007-10-091-2/+2
* Code provision for n32/n64 mips userland emulation. Not functional yet.ths2007-09-301-12/+12
* hflags computation cleanup, by Aurelien Jarno.ths2007-09-261-54/+4
* Timer start/stop implementation, by Aurelien Jarno.ths2007-09-251-3/+10
* Optimise instructions accessing CP0, by Aurelien Jarno.ths2007-09-251-21/+20
* Per-CPU instruction decoding implementation, by Aurelien Jarno.ths2007-09-241-10/+7
* find -type f | xargs sed -i 's/[\t ]$//g' # on most filesths2007-09-161-1/+1
* Partial support for 34K multithreading, not functional yet.ths2007-09-061-90/+785
* Disable 64-bit instructions on 32-bit CPU, by Aurelien Jarno.ths2007-08-261-6/+9
* MIPS64 improvements, based on a patch by Aurelien Jarno.ths2007-06-251-2/+2
* Handle MIPS64 SEGBITS value correctly.ths2007-06-231-2/+3
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