| Commit message (Expand) | Author | Age | Files | Lines |
* | Fix remaining compiler warnings for mips targets. | ths | 2008-12-20 | 1 | -1/+18 |
* | Refactor translation block CPU state handling (Jan Kiszka) | aliguori | 2008-11-18 | 1 | -0/+8 |
* | Convert CPU_PC_FROM_TB to static inline (Jan Kiszka) | aliguori | 2008-11-18 | 1 | -5/+7 |
* | target-mips: optimize gen_op_addr_add() (2/2) | aurel32 | 2008-11-11 | 1 | -6/+7 |
* | Show size for unassigned accesses (Robert Reif) | blueswir1 | 2008-10-06 | 1 | -1/+1 |
* | Move the active FPU registers into env again, and use more TCG registers | ths | 2008-09-18 | 1 | -4/+7 |
* | Less hardcoding of TARGET_USER_ONLY. | ths | 2008-07-23 | 1 | -8/+1 |
* | Use temporary registers for the MIPS FPU emulation. | ths | 2008-07-09 | 1 | -7/+1 |
* | Move interrupt_request and user_mode_only to common cpu state. | pbrook | 2008-07-01 | 1 | -2/+0 |
* | Move CPU save/load registration to common code. | pbrook | 2008-06-30 | 1 | -0/+2 |
* | Add instruction counter. | pbrook | 2008-06-29 | 1 | -0/+6 |
* | More efficient target register / TC accesses. | ths | 2008-06-27 | 1 | -37/+40 |
* | Remove remaining uses of T0 in the MIPS target. | ths | 2008-06-24 | 1 | -3/+0 |
* | T1 is now dead. | ths | 2008-06-24 | 1 | -1/+0 |
* | Move FP TNs to cpu env. | ths | 2008-06-11 | 1 | -5/+6 |
* | Fix typo. | pbrook | 2008-05-30 | 1 | -1/+1 |
* | Move clone() register setup to target specific code. Handle fork-like clone. | pbrook | 2008-05-30 | 1 | -0/+10 |
* | Push common interrupt variables to cpu-defs.h (Glauber Costa) | bellard | 2008-05-29 | 1 | -2/+0 |
* | moved halted field to CPU_COMMON | bellard | 2008-05-28 | 1 | -2/+0 |
* | Honour current_tc for MIPS M{T,F}{HI,LO}, by Richard Sandiford. | ths | 2008-05-28 | 1 | -0/+1 |
* | Use TCG for MIPS GPR moves. | ths | 2008-05-06 | 1 | -0/+1 |
* | Simplify mips branch handling. Retire T2 from use. Use TCG for branches. | ths | 2008-05-04 | 1 | -1/+0 |
* | Make MIPS MT implementation more cache friendly. | ths | 2008-02-12 | 1 | -4/+4 |
* | MIPS COP1X (and related) instructions, by Richard Sandiford. | ths | 2007-12-30 | 1 | -7/+11 |
* | De-cruft exception definitions, and implement nicer debug output. | ths | 2007-12-26 | 1 | -15/+12 |
* | Improved PABITS handling, and config register fixes. | ths | 2007-12-25 | 1 | -0/+2 |
* | added cpu_model parameter to cpu_init() | bellard | 2007-11-10 | 1 | -4/+2 |
* | Move kernel loader parameters from the cpu state to being board specific. | ths | 2007-11-09 | 1 | -5/+0 |
* | Implement missing MIPS supervisor mode bits. | ths | 2007-10-28 | 1 | -10/+16 |
* | Handle IBE on MIPS properly. | ths | 2007-10-20 | 1 | -0/+3 |
* | Replace is_user variable with mmu_idx in softmmu core, | j_mayer | 2007-10-14 | 1 | -0/+11 |
* | Unify '-cpu ?' option. | j_mayer | 2007-10-12 | 1 | -0/+1 |
* | Move get_sp_from_cpustate from cpu.h to target_signal.h. | ths | 2007-09-27 | 1 | -5/+0 |
* | linux-user sigaltstack() syscall, by Thayne Harbaugh. | ths | 2007-09-27 | 1 | -0/+5 |
* | Optimise instructions accessing CP0, by Aurelien Jarno. | ths | 2007-09-25 | 1 | -9/+10 |
* | Per-CPU instruction decoding implementation, by Aurelien Jarno. | ths | 2007-09-24 | 1 | -0/+1 |
* | Partial support for 34K multithreading, not functional yet. | ths | 2007-09-06 | 1 | -41/+198 |
* | Handle MIPS64 SEGBITS value correctly. | ths | 2007-06-23 | 1 | -0/+2 |
* | Move target-specific defines to the target directories. | ths | 2007-06-03 | 1 | -0/+6 |
* | Don't kill the registered irqs on reset. | ths | 2007-05-31 | 1 | -3/+4 |
* | Fix CPU (re-)selection on reset. | ths | 2007-05-30 | 1 | -1/+4 |
* | Fix usermode check, thanks Aurelien Jarno. | ths | 2007-05-29 | 1 | -1/+1 |
* | Don't check the FPU state for each FPU instruction, use hflags to | ths | 2007-05-29 | 1 | -3/+5 |
* | Handle PX/UX status flags correctly, by Aurelien Jarno. | ths | 2007-05-28 | 1 | -0/+1 |
* | The 24k wants more watch and srsmap registers. | ths | 2007-05-23 | 1 | -2/+2 |
* | - Move FPU exception handling into helper functions, since they are big. | ths | 2007-05-18 | 1 | -3/+3 |
* | MIPS linux-user update. | ths | 2007-05-13 | 1 | -0/+1 |
* | MIPS TLB style selection at runtime, by Herve Poussineau. | ths | 2007-05-13 | 1 | -8/+24 |
* | MIPS 64-bit FPU support, plus some collateral bugfixes in the | ths | 2007-05-07 | 1 | -19/+25 |
* | Choose number of TLBs at runtime, by Herve Poussineau. | ths | 2007-04-17 | 1 | -0/+1 |