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* cpu-exec: Purge all uses of ENV_GET_CPU()Peter Crosthwaite2015-07-091-1/+1
* cpu: Change cpu_exec_init() arg to cpu, not envPeter Crosthwaite2015-07-091-1/+1
* cpu: Add Error argument to cpu_exec_init()Bharata B Rao2015-07-091-1/+1
* disas: Remove uses of CPU envPeter Crosthwaite2015-06-221-1/+1
* semihosting: create SemihostingConfig structure and semihost.hLeon Alrae2015-06-191-1/+2
* tcg: Change translator-side labels to a pointerRichard Henderson2015-03-131-11/+9
* cpu: Make cpu_init() return QOM CPUState objectEduardo Habkost2015-03-101-8/+1
* tcg: Introduce tcg_op_buf_count and tcg_op_buf_fullRichard Henderson2015-02-121-9/+5
* tcg: Move emit of INDEX_op_end into gen_tb_endRichard Henderson2015-02-121-1/+1
* exec.c: Drop TARGET_HAS_ICE define and checksPeter Maydell2015-01-201-2/+0
* gen-icount: check cflags instead of use_icount globalPaolo Bonzini2015-01-031-1/+1
* translate: check cflags instead of use_icount globalPaolo Bonzini2015-01-031-4/+4
* gdbstub: Allow target CPUs to specify watchpoint STOP_BEFORE_ACCESS flagPeter Maydell2014-10-061-0/+1
* target-lm32: Use cpu_exec_interrupt qom hookRichard Henderson2014-09-253-0/+15
* cpu-exec: Make debug_excp_handler a QOM CPU methodPeter Maydell2014-09-123-4/+5
* trace: [tcg] Include TCG-tracing header on all targetsLluís Vilanova2014-08-121-0/+3
* vl: allow other threads to do qemu_system_vmstop_requestPaolo Bonzini2014-06-231-1/+1
* softmmu: introduce cpu_ldst.hPaolo Bonzini2014-06-052-1/+2
* softmmu: commonize helper definitionsPaolo Bonzini2014-06-051-10/+0
* tcg: Invert the inclusion of helper.hRichard Henderson2014-05-284-9/+4
* lm32: remove lm32_sysMichael Walle2014-05-241-10/+0
* target-lm32: add semihosting supportMichael Walle2014-05-245-2/+238
* savevm: Remove all the unneeded version_minimum_id_old (rest)Juan Quintela2014-05-141-4/+2
* cputlb: Change tlb_set_page() argument to CPUStateAndreas Färber2014-03-131-3/+3
* cputlb: Change tlb_flush() argument to CPUStateAndreas Färber2014-03-131-1/+1
* exec: Change cpu_abort() argument to CPUStateAndreas Färber2014-03-131-1/+1
* cpu-exec: Change cpu_resume_from_signal() argument to CPUStateAndreas Färber2014-03-131-1/+1
* exec: Change cpu_breakpoint_{insert,remove{,_by_ref,_all}} argumentAndreas Färber2014-03-131-2/+7
* exec: Change cpu_watchpoint_{insert,remove{,_by_ref,_all}} argumentAndreas Färber2014-03-131-2/+5
* translate-all: Change cpu_restore_state() argument to CPUStateAndreas Färber2014-03-131-4/+1
* cpu-exec: Change cpu_loop_exit() argument to CPUStateAndreas Färber2014-03-131-3/+3
* exec: Change tlb_fill() argument to CPUStateAndreas Färber2014-03-131-5/+8
* cpu: Move breakpoints field from CPU_COMMON to CPUStateAndreas Färber2014-03-134-5/+7
* cpu: Move watchpoint fields from CPU_COMMON to CPUStateAndreas Färber2014-03-132-4/+5
* cpu: Move exception_index field from CPU_COMMON to CPUStateAndreas Färber2014-03-132-8/+10
* cpu: Turn cpu_handle_mmu_fault() into a CPUClass hookAndreas Färber2014-03-134-5/+9
* cpu: Factor out cpu_generic_init()Andreas Färber2014-03-131-12/+1
* cpu: Turn cpu_has_work() into a CPUClass hookAndreas Färber2014-03-132-5/+6
* target-lm32: stop VM on illegal or unknown instructionMichael Walle2014-02-043-38/+86
* target-lm32: add breakpoint/watchpoint supportMichael Walle2014-02-047-8/+179
* target-lm32: move model features to LM32CPUMichael Walle2014-02-045-142/+215
* target-lm32: kill cpu_abort() callsMichael Walle2014-02-041-32/+40
* target: Include softmmu_exec.h where forgottenRichard Henderson2013-09-021-0/+2
* tcg: Change tcg_gen_exit_tb argument to uintptr_tRichard Henderson2013-09-021-1/+1
* lm32_juart: Relocate and tidy headerAndreas Färber2013-07-291-1/+1
* cpu: Partially revert "cpu: Change qemu_init_vcpu() argument to CPUState"Andreas Färber2013-07-291-2/+4
* cpu: Introduce CPUClass::gdb_{read,write}_register()Andreas Färber2013-07-274-4/+16
* gdbstub: Replace GET_REG*() macros with gdb_get_reg*() functionsAndreas Färber2013-07-271-8/+8
* target-lm32: Move cpu_gdb_{read,write}_register()Andreas Färber2013-07-271-0/+85
* cpu: Introduce CPUState::gdb_num_regs and CPUClass::gdb_num_core_regsAndreas Färber2013-07-261-0/+1
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