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target-arm
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translate-a64.c
Commit message (
Expand
)
Author
Age
Files
Lines
*
target-arm: A64: remove redundant store
Alex Bennée
2014-11-02
1
-1
/
+0
*
target-arm: rename arm_current_pl to arm_current_el
Greg Bellows
2014-10-24
1
-8
/
+8
*
target-arm: Handle SMC/HVC undef-if-no-ELx in pre_* helpers
Peter Maydell
2014-10-24
1
-2
/
+2
*
target-arm: A64: Emulate the SMC insn
Edgar E. Iglesias
2014-09-29
1
-0
/
+13
*
target-arm: A64: Emulate the HVC insn
Edgar E. Iglesias
2014-09-29
1
-9
/
+22
*
target-arm: Implement ARMv8 single-step handling for A64 code
Peter Maydell
2014-08-19
1
-5
/
+86
*
target-arm: A64: Avoid duplicate exit_tb(0) in non-linked goto_tb
Peter Maydell
2014-08-19
1
-2
/
+3
*
target-arm: Fix return address for A64 BRK instructions
Peter Maydell
2014-08-19
1
-1
/
+1
*
trace: [tcg] Include TCG-tracing header on all targets
Lluís Vilanova
2014-08-12
1
-0
/
+2
*
target-arm/translate-a64.c: Fix dead ?: in handle_simd_shift_fpint_conv()
Peter Maydell
2014-06-19
1
-1
/
+1
*
target-arm/translate-a64.c: Remove dead ?: in disas_simd_3same_int()
Peter Maydell
2014-06-19
1
-1
/
+2
*
target-arm: A64: Implement two-register SHA instructions
Peter Maydell
2014-06-09
1
-1
/
+44
*
target-arm: A64: Implement 3-register SHA instructions
Peter Maydell
2014-06-09
1
-1
/
+58
*
target-arm: A64: Implement AES instructions
Peter Maydell
2014-06-09
1
-1
/
+50
*
target-arm: A64: Implement CRC instructions
Peter Maydell
2014-06-09
1
-1
/
+53
*
target-arm: A64: Use PMULL feature bit for PMULL
Peter Maydell
2014-06-09
1
-1
/
+1
*
target-arm: move arm_*_code to a separate file
Paolo Bonzini
2014-06-05
1
-0
/
+1
*
tcg: Invert the inclusion of helper.h
Richard Henderson
2014-05-28
1
-3
/
+2
*
target-arm: A64: Trap ERET from EL0 at translation time
Edgar E. Iglesias
2014-05-27
1
-0
/
+4
*
target-arm: Move get_mem_index to translate.h
Edgar E. Iglesias
2014-05-27
1
-9
/
+0
*
target-arm: A64: Handle blr lr
Edgar E. Iglesias
2014-05-01
1
-1
/
+2
*
target-arm: implement WFE/YIELD as a yield for AArch64
Rob Herring
2014-05-01
1
-0
/
+6
*
target-arm: A64: fix unallocated test of scalar SQXTUN
Alex Bennée
2014-04-17
1
-1
/
+1
*
target-arm: Implement AArch64 EL1 exception handling
Rob Herring
2014-04-17
1
-0
/
+3
*
target-arm: A64: Implement DC ZVA
Peter Maydell
2014-04-17
1
-0
/
+5
*
target-arm: A64: Add assertion that FP access was checked
Peter Maydell
2014-04-17
1
-24
/
+51
*
target-arm: A64: Correctly fault FP/Neon if CPACR.FPEN set
Peter Maydell
2014-04-17
1
-5
/
+295
*
target-arm: Add support for generating exceptions with syndrome information
Peter Maydell
2014-04-17
1
-14
/
+35
*
target-arm: Provide correct syndrome information for cpreg access traps
Peter Maydell
2014-04-17
1
-1
/
+7
*
target-arm: Split out private-to-target functions into internals.h
Peter Maydell
2014-04-17
1
-0
/
+1
*
target-arm: Fix A64 Neon MLS
Peter Maydell
2014-03-24
1
-1
/
+1
*
target-arm: A64: Add saturating accumulate ops (USQADD/SUQADD)
Alex Bennée
2014-03-18
1
-4
/
+105
*
target-arm: A64: Add saturating int ops (SQNEG/SQABS)
Alex Bennée
2014-03-18
1
-6
/
+45
*
target-arm: A64: Add [UF]RSQRTE (reciprocal root estimate)
Alex Bennée
2014-03-17
1
-6
/
+21
*
target-arm: A64: Implement FCVTXN
Peter Maydell
2014-03-17
1
-1
/
+19
*
target-arm: A64: Implement scalar saturating narrow ops
Alex Bennée
2014-03-17
1
-7
/
+28
*
target-arm: A64: Move handle_2misc_narrow function
Alex Bennée
2014-03-17
1
-90
/
+90
*
target-arm: A64: Implement AdvSIMD reciprocal estimate insns URECPE, FRECPE
Alex Bennée
2014-03-17
1
-3
/
+19
*
target-arm: A64: Implement FCVTZS, FCVTZU in the shift-imm categories
Peter Maydell
2014-03-17
1
-2
/
+78
*
target-arm: A64: Handle saturating left shifts SQSHL, SQSHLU, UQSHL
Peter Maydell
2014-03-17
1
-0
/
+132
*
target-arm: A64: Implement FRINT*
Peter Maydell
2014-03-17
1
-3
/
+42
*
target-arm: A64: Implement SRI
Peter Maydell
2014-03-17
1
-8
/
+49
*
target-arm: A64: Add FRECPX (reciprocal exponent)
Alex Bennée
2014-03-17
1
-1
/
+69
*
target-arm: A64: List unsupported shift-imm opcodes
Peter Maydell
2014-03-17
1
-2
/
+11
*
target-arm: A64: Implement FCVTL
Peter Maydell
2014-03-17
1
-0
/
+47
*
target-arm: A64: Implement FCVTN
Peter Maydell
2014-03-17
1
-1
/
+23
*
target-arm: A64: Implement FCVT[NMAPZ][SU] SIMD instructions
Peter Maydell
2014-03-17
1
-19
/
+169
*
target-arm: A64: Implement SHLL, SHLL2
Peter Maydell
2014-03-17
1
-1
/
+31
*
target-arm: A64: Implement SADDLP, UADDLP, SADALP, UADALP
Peter Maydell
2014-03-17
1
-1
/
+74
*
target-arm: A64: Saturating and narrowing shift ops
Alex Bennée
2014-03-17
1
-3
/
+178
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