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author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-03-31 16:54:14 +0000 |
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committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-03-31 16:54:14 +0000 |
commit | a4bc3afc09b27cca4adfc1500551cc9a36219edf (patch) | |
tree | bc54c912d3168617304742b1a1a2e904d01dbcfc /vl.h | |
parent | c62db10577295ed4dc26fa9acd6e6f30cea7ffd0 (diff) | |
download | hqemu-a4bc3afc09b27cca4adfc1500551cc9a36219edf.zip hqemu-a4bc3afc09b27cca4adfc1500551cc9a36219edf.tar.gz |
Malta CBUS UART support.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2557 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'vl.h')
-rw-r--r-- | vl.h | 9 |
1 files changed, 8 insertions, 1 deletions
@@ -1035,7 +1035,14 @@ SerialState *serial_init(SetIRQFunc *set_irq, void *opaque, int base, int irq, CharDriverState *chr); SerialState *serial_mm_init (SetIRQFunc *set_irq, void *opaque, target_ulong base, int it_shift, - int irq, CharDriverState *chr); + int irq, CharDriverState *chr, + int ioregister); +uint32_t serial_mm_readb (void *opaque, target_phys_addr_t addr); +void serial_mm_writeb (void *opaque, target_phys_addr_t addr, uint32_t value); +uint32_t serial_mm_readw (void *opaque, target_phys_addr_t addr); +void serial_mm_writew (void *opaque, target_phys_addr_t addr, uint32_t value); +uint32_t serial_mm_readl (void *opaque, target_phys_addr_t addr); +void serial_mm_writel (void *opaque, target_phys_addr_t addr, uint32_t value); /* parallel.c */ |