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author | Peter Maydell <peter.maydell@linaro.org> | 2014-11-03 16:43:32 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2014-11-03 16:43:32 +0000 |
commit | eb5f222b5c125de1b47970c6096a3107ffe1d69b (patch) | |
tree | 1a52e60e8070f9b664f761bce085edde569a5986 /tests/qemu-iotests/iotests.py | |
parent | 7135781f65f1267a72bf554ee2b7bd605f9e59aa (diff) | |
parent | 437a8c11c06f53ed3bcdcc3e5abc5d20b2d439bd (diff) | |
download | hqemu-eb5f222b5c125de1b47970c6096a3107ffe1d69b.zip hqemu-eb5f222b5c125de1b47970c6096a3107ffe1d69b.tar.gz |
Merge remote-tracking branch 'remotes/xtensa/tags/20141103-xtensa' into staging
Xtensa fixes and improvements 2014-11-03:
- build fixes for cores w/o windowed registers and with profiling
interrupts;
- fix uImage load address for MMUv2 cores;
- add script for automatic core import from xtensa configuration overlay.
# gpg: Signature made Sun 02 Nov 2014 22:04:44 GMT using RSA key ID F83FA044
# gpg: Good signature from "Max Filippov <max.filippov@cogentembedded.com>"
# gpg: aka "Max Filippov <jcmvbkbc@gmail.com>"
* remotes/xtensa/tags/20141103-xtensa:
MAINTAINERS: update xtensa boards
target-xtensa: fix build for cores w/o windowed registers
target-xtensa: add core importing script
hw/xtensa/xtfpga: treat uImage load address as virtual
hw/core/loader: implement address translation in uimage loader
target-xtensa: avoid duplicate timer interrupt delivery
target-xtensa: tests: pre-process tests linker script
target-xtensa: add definition for XTHAL_INTTYPE_PROFILING
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'tests/qemu-iotests/iotests.py')
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