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authorRichard Henderson <rth@twiddle.net>2010-04-10 22:22:28 +0200
committerAurelien Jarno <aurelien@aurel32.net>2010-04-26 20:06:18 +0200
commit70ec48ef55e5a3d5ecef8599f3fbdfb87f0740dc (patch)
tree88c225b86de2e90a66fc65a9d18c3c4a9fbba04f /tcg
parent2d097a83e223d3e06de5047e95eeadf1f919ac56 (diff)
downloadhqemu-70ec48ef55e5a3d5ecef8599f3fbdfb87f0740dc.zip
hqemu-70ec48ef55e5a3d5ecef8599f3fbdfb87f0740dc.tar.gz
tcg-hppa: Remove automatically implemented opcodes.
Remove neg, ext8u, ext16u, as requested. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'tcg')
-rw-r--r--tcg/hppa/tcg-target.c16
-rw-r--r--tcg/hppa/tcg-target.h8
2 files changed, 5 insertions, 19 deletions
diff --git a/tcg/hppa/tcg-target.c b/tcg/hppa/tcg-target.c
index 6536a42..cb605f1 100644
--- a/tcg/hppa/tcg-target.c
+++ b/tcg/hppa/tcg-target.c
@@ -1431,19 +1431,6 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
tcg_out_ext16s(s, args[0], args[1]);
break;
- /* These three correspond exactly to the fallback implementation.
- But by including them we reduce the number of TCG ops that
- need to be generated, and these opcodes are fairly common. */
- case INDEX_op_neg_i32:
- tcg_out_arith(s, args[0], TCG_REG_R0, args[1], INSN_SUB);
- break;
- case INDEX_op_ext8u_i32:
- tcg_out_andi(s, args[0], args[1], 0xff);
- break;
- case INDEX_op_ext16u_i32:
- tcg_out_andi(s, args[0], args[1], 0xffff);
- break;
-
case INDEX_op_brcond_i32:
tcg_out_brcond(s, args[2], args[0], args[1], const_args[1], args[3]);
break;
@@ -1550,13 +1537,10 @@ static const TCGTargetOpDef hppa_op_defs[] = {
{ INDEX_op_bswap16_i32, { "r", "r" } },
{ INDEX_op_bswap32_i32, { "r", "r" } },
- { INDEX_op_neg_i32, { "r", "r" } },
{ INDEX_op_not_i32, { "r", "r" } },
{ INDEX_op_ext8s_i32, { "r", "r" } },
- { INDEX_op_ext8u_i32, { "r", "r" } },
{ INDEX_op_ext16s_i32, { "r", "r" } },
- { INDEX_op_ext16u_i32, { "r", "r" } },
{ INDEX_op_brcond_i32, { "rZ", "rJ" } },
{ INDEX_op_brcond2_i32, { "rZ", "rZ", "rJ", "rJ" } },
diff --git a/tcg/hppa/tcg-target.h b/tcg/hppa/tcg-target.h
index 7e21f1d..a5cc440 100644
--- a/tcg/hppa/tcg-target.h
+++ b/tcg/hppa/tcg-target.h
@@ -89,15 +89,17 @@ enum {
#define TCG_TARGET_HAS_rot_i32
#define TCG_TARGET_HAS_ext8s_i32
#define TCG_TARGET_HAS_ext16s_i32
-#define TCG_TARGET_HAS_ext8u_i32
-#define TCG_TARGET_HAS_ext16u_i32
#define TCG_TARGET_HAS_bswap16_i32
#define TCG_TARGET_HAS_bswap32_i32
#define TCG_TARGET_HAS_not_i32
-#define TCG_TARGET_HAS_neg_i32
#define TCG_TARGET_HAS_andc_i32
// #define TCG_TARGET_HAS_orc_i32
+/* optional instructions automatically implemented */
+#undef TCG_TARGET_HAS_neg_i32 /* sub rd, 0, rs */
+#undef TCG_TARGET_HAS_ext8u_i32 /* and rd, rs, 0xff */
+#undef TCG_TARGET_HAS_ext16u_i32 /* and rd, rs, 0xffff */
+
#define TCG_TARGET_HAS_GUEST_BASE
/* Note: must be synced with dyngen-exec.h */
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