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| author | Bastian Koppelmann <kbastian@mail.uni-paderborn.de> | 2015-02-25 12:29:24 +0000 |
|---|---|---|
| committer | Bastian Koppelmann <kbastian@mail.uni-paderborn.de> | 2015-03-16 15:53:08 +0000 |
| commit | b724b012a4ea9877c5ddad254df63735a945618c (patch) | |
| tree | 0fe7fbb4956c3ab6957bafb2ef84ac48463d4d4b /target-tricore/cpu.h | |
| parent | eb989d2545832deff386b23c904fc26f78303637 (diff) | |
| download | hqemu-b724b012a4ea9877c5ddad254df63735a945618c.zip hqemu-b724b012a4ea9877c5ddad254df63735a945618c.tar.gz | |
target-tricore: Add instructions of SYS opcode format
This adds only the non trap instructions.
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Diffstat (limited to 'target-tricore/cpu.h')
| -rw-r--r-- | target-tricore/cpu.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/target-tricore/cpu.h b/target-tricore/cpu.h index b473426..90bf006 100644 --- a/target-tricore/cpu.h +++ b/target-tricore/cpu.h @@ -238,6 +238,13 @@ struct CPUTriCoreState { #define MASK_LCX_LCXS 0x000f0000 #define MASK_LCX_LCX0 0x0000ffff +#define MASK_DBGSR_DE 0x1 +#define MASK_DBGSR_HALT 0x6 +#define MASK_DBGSR_SUSP 0x10 +#define MASK_DBGSR_PREVSUSP 0x20 +#define MASK_DBGSR_PEVT 0x40 +#define MASK_DBGSR_EVTSRC 0x1f00 + #define TRICORE_HFLAG_KUU 0x3 #define TRICORE_HFLAG_UM0 0x00002 /* user mode-0 flag */ #define TRICORE_HFLAG_UM1 0x00001 /* user mode-1 flag */ |
