From b724b012a4ea9877c5ddad254df63735a945618c Mon Sep 17 00:00:00 2001 From: Bastian Koppelmann Date: Wed, 25 Feb 2015 12:29:24 +0000 Subject: target-tricore: Add instructions of SYS opcode format This adds only the non trap instructions. Signed-off-by: Bastian Koppelmann --- target-tricore/cpu.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'target-tricore/cpu.h') diff --git a/target-tricore/cpu.h b/target-tricore/cpu.h index b473426..90bf006 100644 --- a/target-tricore/cpu.h +++ b/target-tricore/cpu.h @@ -238,6 +238,13 @@ struct CPUTriCoreState { #define MASK_LCX_LCXS 0x000f0000 #define MASK_LCX_LCX0 0x0000ffff +#define MASK_DBGSR_DE 0x1 +#define MASK_DBGSR_HALT 0x6 +#define MASK_DBGSR_SUSP 0x10 +#define MASK_DBGSR_PREVSUSP 0x20 +#define MASK_DBGSR_PEVT 0x40 +#define MASK_DBGSR_EVTSRC 0x1f00 + #define TRICORE_HFLAG_KUU 0x3 #define TRICORE_HFLAG_UM0 0x00002 /* user mode-0 flag */ #define TRICORE_HFLAG_UM1 0x00001 /* user mode-1 flag */ -- cgit v1.1