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author | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2004-04-25 17:57:43 +0000 |
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committer | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2004-04-25 17:57:43 +0000 |
commit | d720b93d0bcfe1beb729245b9ed1e5f071a24bd5 (patch) | |
tree | 4f9d65b82b9eb8bd65681cfde6bb18e7b6bd2eae /target-sparc | |
parent | eeab3a558f89e30ee93ef628bcbd6a3f64b9b8a6 (diff) | |
download | hqemu-d720b93d0bcfe1beb729245b9ed1e5f071a24bd5.zip hqemu-d720b93d0bcfe1beb729245b9ed1e5f071a24bd5.tar.gz |
precise self modifying code support
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@745 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-sparc')
-rw-r--r-- | target-sparc/cpu.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h index af5ecb5..e86fae9 100644 --- a/target-sparc/cpu.h +++ b/target-sparc/cpu.h @@ -43,6 +43,14 @@ typedef struct CPUSPARCState { void *opaque; /* NOTE: we allow 8 more registers to handle wrapping */ uint32_t regbase[NWINDOWS * 16 + 8]; + + /* in order to avoid passing too many arguments to the memory + write helpers, we store some rarely used information in the CPU + context) */ + unsigned long mem_write_pc; /* host pc at which the memory was + written */ + unsigned long mem_write_vaddr; /* target virtual addr at which the + memory was written */ } CPUSPARCState; CPUSPARCState *cpu_sparc_init(void); |