summaryrefslogtreecommitdiffstats
path: root/target-ppc
diff options
context:
space:
mode:
authorj_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162>2007-04-16 20:09:45 +0000
committerj_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162>2007-04-16 20:09:45 +0000
commit8ecc7913525ecb6a1a41ceceac93d485a544054f (patch)
treec23ccf196aa6cf9436dcda3c80decad4c1540a92 /target-ppc
parent3142255c62f3e69a1fa75427426a3e64b6349fbd (diff)
downloadhqemu-8ecc7913525ecb6a1a41ceceac93d485a544054f.zip
hqemu-8ecc7913525ecb6a1a41ceceac93d485a544054f.tar.gz
Add callbacks to allow dynamic change of PowerPC clocks (to be improved)
Fix embedded PowerPC watchdog and timers Fix PowerPC 405 SPR Add generic PowerPC 405 core instanciation code + resets support. Implement simple peripherals shared by most PowerPC 405 implementations PowerPC 405 EC & EP microcontrollers preliminary support git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2690 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc')
-rw-r--r--target-ppc/cpu.h1
-rw-r--r--target-ppc/exec.h1
-rw-r--r--target-ppc/op.c5
-rw-r--r--target-ppc/translate_init.c28
4 files changed, 20 insertions, 15 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index eb3340c..f17f846 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -880,6 +880,7 @@ void cpu_ppc601_store_rtcl (CPUPPCState *env, uint32_t value);
void cpu_ppc601_store_rtcu (CPUPPCState *env, uint32_t value);
target_ulong load_40x_pit (CPUPPCState *env);
void store_40x_pit (CPUPPCState *env, target_ulong val);
+void store_40x_dbcr0 (CPUPPCState *env, uint32_t val);
void store_booke_tcr (CPUPPCState *env, target_ulong val);
void store_booke_tsr (CPUPPCState *env, target_ulong val);
void ppc_tlb_invalidate_all (CPUPPCState *env);
diff --git a/target-ppc/exec.h b/target-ppc/exec.h
index 87e8c18..a0f91cc 100644
--- a/target-ppc/exec.h
+++ b/target-ppc/exec.h
@@ -109,6 +109,7 @@ void ppc6xx_tlb_invalidate_virt (CPUState *env, target_ulong eaddr,
int is_code);
void ppc6xx_tlb_store (CPUState *env, target_ulong EPN, int way, int is_code,
target_ulong pte0, target_ulong pte1);
+void ppc4xx_tlb_invalidate_all (CPUState *env);
static inline void env_to_regs(void)
{
diff --git a/target-ppc/op.c b/target-ppc/op.c
index 68828f5..b8498f1 100644
--- a/target-ppc/op.c
+++ b/target-ppc/op.c
@@ -2454,6 +2454,11 @@ void OPPROTO op_store_40x_pit (void)
RETURN();
}
+void OPPROTO op_store_40x_dbcr0 (void)
+{
+ store_40x_dbcr0(env, T0);
+}
+
void OPPROTO op_store_booke_tcr (void)
{
store_booke_tcr(env, T0);
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 215bdcb..cb40dfb 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -344,6 +344,15 @@ static void spr_write_40x_pit (void *opaque, int sprn)
gen_op_store_40x_pit();
}
+static void spr_write_40x_dbcr0 (void *opaque, int sprn)
+{
+ DisasContext *ctx = opaque;
+
+ gen_op_store_40x_dbcr0();
+ /* We must stop translation as we may have rebooted */
+ RET_STOP(ctx);
+}
+
static void spr_write_booke_tcr (void *opaque, int sprn)
{
gen_op_store_booke_tcr();
@@ -1175,7 +1184,7 @@ static void gen_spr_BookE (CPUPPCState *env)
/* XXX : not implemented */
spr_register(env, SPR_BOOKE_DBSR, "DBSR",
SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, &spr_write_generic,
+ &spr_read_generic, &spr_write_clear,
0x00000000);
spr_register(env, SPR_BOOKE_DEAR, "DEAR",
SPR_NOACCESS, SPR_NOACCESS,
@@ -1651,13 +1660,13 @@ static void gen_spr_40x (CPUPPCState *env)
/* XXX : not implemented */
spr_register(env, SPR_40x_DBCR0, "DBCR0",
SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, &spr_write_generic,
+ &spr_read_generic, &spr_write_40x_dbcr0,
0x00000000);
/* XXX : not implemented */
spr_register(env, SPR_40x_DBSR, "DBSR",
SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, &spr_write_generic,
- /* Last reset was system reset (system boot */
+ &spr_read_generic, &spr_write_clear,
+ /* Last reset was system reset */
0x00000300);
/* XXX : not implemented */
spr_register(env, SPR_40x_IAC1, "IAC1",
@@ -1751,17 +1760,6 @@ static void gen_spr_405 (CPUPPCState *env)
&spr_read_ureg, SPR_NOACCESS,
&spr_read_ureg, SPR_NOACCESS,
0x00000000);
- /* Debug */
- /* XXX : not implemented */
- spr_register(env, SPR_40x_DAC2, "DAC2",
- SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, &spr_write_generic,
- 0x00000000);
- /* XXX : not implemented */
- spr_register(env, SPR_40x_IAC2, "IAC2",
- SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, &spr_write_generic,
- 0x00000000);
}
/* SPR shared between PowerPC 401 & 403 implementations */
OpenPOWER on IntegriCloud