Initial overlay of HQEMU 2.5.2 changes onto underlying 2.5.1 QEMU GIT tree2.5.1_overlay

5 files changed, 65 insertions, 10 deletions

diff --git a/target-ppc/Makefile.objs b/target-ppc/Makefile.objs
index e667e69..363a701 100644
--- a/target-ppc/Makefile.objs
+++ b/target-ppc/Makefile.objs
@@ -1,5 +1,5 @@
 obj-y += cpu-models.o
-obj-y += translate.o
+obj-y += translate.o helper.o
 ifeq ($(CONFIG_SOFTMMU),y)
 obj-y += machine.o mmu_helper.o mmu-hash32.o monitor.o
 obj-$(TARGET_PPC64) += mmu-hash64.o arch_dump.o
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 9706000..bf1481a 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -88,7 +88,6 @@
 
 /*****************************************************************************/
 /* MMU model                                                                 */
-typedef enum powerpc_mmu_t powerpc_mmu_t;
 enum powerpc_mmu_t {
     POWERPC_MMU_UNKNOWN    = 0x00000000,
     /* Standard 32 bits PowerPC MMU                            */
@@ -133,10 +132,10 @@ enum powerpc_mmu_t {
                              | 0x00000004,
 #endif /* defined(TARGET_PPC64) */
 };
+typedef enum powerpc_mmu_t powerpc_mmu_t;
 
 /*****************************************************************************/
 /* Exception model                                                           */
-typedef enum powerpc_excp_t powerpc_excp_t;
 enum powerpc_excp_t {
     POWERPC_EXCP_UNKNOWN   = 0,
     /* Standard PowerPC exception model */
@@ -170,6 +169,7 @@ enum powerpc_excp_t {
     POWERPC_EXCP_POWER7,
 #endif /* defined(TARGET_PPC64) */
 };
+typedef enum powerpc_excp_t powerpc_excp_t;
 
 /*****************************************************************************/
 /* Exception vectors definitions                                             */
@@ -298,7 +298,6 @@ enum {
 
 /*****************************************************************************/
 /* Input pins model                                                          */
-typedef enum powerpc_input_t powerpc_input_t;
 enum powerpc_input_t {
     PPC_FLAGS_INPUT_UNKNOWN = 0,
     /* PowerPC 6xx bus                  */
@@ -316,6 +315,7 @@ enum powerpc_input_t {
     /* Freescale RCPU bus               */
     PPC_FLAGS_INPUT_RCPU,
 };
+typedef enum powerpc_input_t powerpc_input_t;
 
 #define PPC_INPUT(env) (env->bus_model)
 
@@ -1168,6 +1168,8 @@ struct CPUPPCState {
     uint32_t tm_vscr;
     uint64_t tm_dscr;
     uint64_t tm_tar;
+
+    CPU_OPTIMIZATION_COMMON
 };
 
 #define SET_FIT_PERIOD(a_, b_, c_, d_)          \
@@ -2226,6 +2228,17 @@ static inline void cpu_get_tb_cpu_state(CPUPPCState *env, target_ulong *pc,
     *flags = env->hflags;
 }
 
+static inline target_ulong cpu_get_pc(CPUPPCState *env)
+{
+    return env->nip;
+}
+
+static inline int cpu_check_state(CPUPPCState *env,
+                                  target_ulong cs_base, int flags)
+{
+    return cs_base == 0 && (uint32_t)flags == env->hflags;
+}
+
 #if !defined(CONFIG_USER_ONLY)
 static inline int booke206_tlbm_id(CPUPPCState *env, ppcmas_tlb_t *tlbm)
 {
@@ -2311,7 +2324,7 @@ static inline uint32_t booke206_tlbnps(CPUPPCState *env, const int tlbn)
         uint32_t tlbncfg = env->spr[SPR_BOOKE_TLB0CFG + tlbn];
         uint32_t min = (tlbncfg & TLBnCFG_MINSIZE) >> TLBnCFG_MINSIZE_SHIFT;
         uint32_t max = (tlbncfg & TLBnCFG_MAXSIZE) >> TLBnCFG_MAXSIZE_SHIFT;
-        int i;
+        unsigned i;
         for (i = min; i <= max; i++) {
             ret |= (1 << (i << 1));
         }
diff --git a/target-ppc/helper.c b/target-ppc/helper.c
new file mode 100644
index 0000000..5ec684b
--- /dev/null
+++ b/target-ppc/helper.c
@@ -0,0 +1,9 @@
+#include "cpu.h"
+CPUState *cpu_create(void)
+{
+    PowerPCCPU *cpu = g_malloc0(sizeof(PowerPCCPU));
+    CPUState *cs = CPU(cpu);
+    memcpy(cpu, POWERPC_CPU(first_cpu), sizeof(PowerPCCPU));
+    cs->env_ptr = &cpu->env;
+    return cs;
+}
diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index 869be15..c96f51b 100644
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -667,3 +667,5 @@ DEF_HELPER_4(dscli, void, env, fprp, fprp, i32)
 DEF_HELPER_4(dscliq, void, env, fprp, fprp, i32)
 
 DEF_HELPER_1(tbegin, void, env)
+
+#include "hqemu-helper.h"
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 41a7258..15cedc5 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -28,7 +28,13 @@
 #include "exec/helper-gen.h"
 
 #include "trace-tcg.h"
+#include "hqemu.h"
 
+#if defined(CONFIG_USER_ONLY)
+#define IS_USER(s) 1
+#else
+#define IS_USER(s) (s->mem_idx == MMU_USER_IDX)
+#endif
 
 #define CPU_SINGLE_STEP 0x1
 #define CPU_BRANCH_STEP 0x2
@@ -180,6 +186,8 @@ void ppc_translate_init(void)
                                              offsetof(CPUPPCState, access_type), "access_type");
 
     done_init = 1;
+
+    copy_tcg_context_global();
 }
 
 /* internal defines */
@@ -11479,7 +11487,12 @@ void gen_intermediate_code(CPUPPCState *env, struct TranslationBlock *tb)
         max_insns = TCG_MAX_INSNS;
     }
 
-    gen_tb_start(tb);
+    if (!build_llvm(env)) {
+        gen_tb_start(tb);
+        if (tracer_mode != TRANS_MODE_NONE)
+            tcg_gen_hotpatch(IS_USER(ctxp), tracer_mode == TRANS_MODE_HYBRIDS ||
+                                            tracer_mode == TRANS_MODE_HYBRIDM);
+    }
     tcg_clear_temp_count();
     /* Set env in case of segfault during code fetch */
     while (ctx.exception == POWERPC_EXCP_NONE && !tcg_op_buf_full()) {
@@ -11553,6 +11566,9 @@ void gen_intermediate_code(CPUPPCState *env, struct TranslationBlock *tb)
 #if defined(DO_PPC_STATISTICS)
         handler->count++;
 #endif
+        if (build_llvm(env) && num_insns == tb->icount)
+            break;
+
         /* Check trace mode exceptions */
         if (unlikely(ctx.singlestep_enabled & CPU_SINGLE_STEP &&
                      (ctx.nip <= 0x100 || ctx.nip > 0xF00) &&
@@ -11576,6 +11592,16 @@ void gen_intermediate_code(CPUPPCState *env, struct TranslationBlock *tb)
             exit(1);
         }
     }
+
+    if (build_llvm(env) && tb->size != ctx.nip - pc_start) {
+        /* consistency check with tb info. we must make sure
+         *  guest basic blocks are the same */
+        fprintf(stderr, "inconsistant block with pc 0x"TARGET_FMT_lx" size %d"
+                " icount=%d (error size="TARGET_FMT_ld")\n",
+                tb->pc, tb->size, tb->icount, ctx.nip - pc_start);
+        exit(0);
+    }
+
     if (tb->cflags & CF_LAST_IO)
         gen_io_end();
     if (ctx.exception == POWERPC_EXCP_NONE) {
@@ -11587,13 +11613,18 @@ void gen_intermediate_code(CPUPPCState *env, struct TranslationBlock *tb)
         /* Generate the return instruction */
         tcg_gen_exit_tb(0);
     }
-    gen_tb_end(tb, num_insns);
 
-    tb->size = ctx.nip - pc_start;
-    tb->icount = num_insns;
+    if (build_llvm(env)) {
+        /* Terminate the linked list.  */
+        tcg_ctx.gen_op_buf[tcg_ctx.gen_last_op_idx].next = -1;
+    } else {
+        gen_tb_end(tb, num_insns);
+        tb->size = ctx.nip - pc_start;
+        tb->icount = num_insns;
+    }
 
 #if defined(DEBUG_DISAS)
-    if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
+    if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM) && !build_llvm(env)) {
         int flags;
         flags = env->bfd_mach;
         flags |= ctx.le_mode << 16;