diff options
author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-07-11 10:36:47 +0000 |
---|---|---|
committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-07-11 10:36:47 +0000 |
commit | 3c4c9f9f51599845fba61240aba0f38485df7c14 (patch) | |
tree | df28fd464900cdb523818d60a0f871242b520ab2 /target-ppc/cpu.h | |
parent | 81442192975a7badff6c8abcd7c800ef4c552470 (diff) | |
download | hqemu-3c4c9f9f51599845fba61240aba0f38485df7c14.zip hqemu-3c4c9f9f51599845fba61240aba0f38485df7c14.tar.gz |
Fix PPCEMB for 32bit hosts.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3059 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc/cpu.h')
-rw-r--r-- | target-ppc/cpu.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 57e4662..435b838 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -693,7 +693,7 @@ struct CPUPPCState { /* temporary fixed-point registers * used to emulate 64 bits target on 32 bits hosts */ - target_ulong t0, t1, t2; + ppc_gpr_t t0, t1, t2; #endif ppc_avr_t t0_avr, t1_avr, t2_avr; |