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author | j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-09-30 03:46:38 +0000 |
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committer | j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-09-30 03:46:38 +0000 |
commit | 0db1b20e478efd378c19e79057453a79b4c81e11 (patch) | |
tree | f86fdf23d39ac3e0c59750ac0971114648aec0c3 /target-ppc/cpu.h | |
parent | 1548b15d23d33b8125a0268eaf2126088510a181 (diff) | |
download | hqemu-0db1b20e478efd378c19e79057453a79b4c81e11.zip hqemu-0db1b20e478efd378c19e79057453a79b4c81e11.tar.gz |
Synchronize with latest PowerPC ISA VEA:
* fix invalid instructions bits masks
* new wait instruction
* more comments about effect of cache instructions on the MMU
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3287 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc/cpu.h')
0 files changed, 0 insertions, 0 deletions