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author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-04-19 16:35:09 +0000 |
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committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-04-19 16:35:09 +0000 |
commit | 19221bdaf816bc15dbc0c1a4b5594bf7a4ea2ce5 (patch) | |
tree | 0e99768938c73c80854cb21223f0f28308fe7cba /target-mips | |
parent | 2802bfe387a0ab5689b0781743682a5b71a9fdc2 (diff) | |
download | hqemu-19221bdaf816bc15dbc0c1a4b5594bf7a4ea2ce5.zip hqemu-19221bdaf816bc15dbc0c1a4b5594bf7a4ea2ce5.tar.gz |
Update comment. We can't easily adhere to the architecture spec because
it would involve counting the actually executed instructions.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2708 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips')
-rw-r--r-- | target-mips/mips-defs.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/target-mips/mips-defs.h b/target-mips/mips-defs.h index 01034c3..95b5ef8 100644 --- a/target-mips/mips-defs.h +++ b/target-mips/mips-defs.h @@ -18,9 +18,9 @@ #define TARGET_LONG_BITS 32 #endif -/* Strictly follow the architecture standard: Disallow "special" - instruction handling for PMON/SPIM, force cycle-dependent - Count/Compare maintenance. */ +/* Strictly follow the architecture standard: + - Disallow "special" instruction handling for PMON/SPIM. + Note that we still maintain Count/Compare to match the host clock. */ //#define MIPS_STRICT_STANDARD 1 #endif /* !defined (__QEMU_MIPS_DEFS_H__) */ |