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author | Peter Maydell <peter.maydell@linaro.org> | 2014-05-15 15:38:39 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2014-05-15 15:38:40 +0100 |
commit | ef3cb5ca82c341e575ee5cb9a9dd8edc6aa96b1b (patch) | |
tree | 1ec45abf7d4bcadc6bfa97e2be4d23e549d02eec /target-i386/cpu.c | |
parent | 06e33c1c3c193074574eb3813eded91bff0fc86f (diff) | |
parent | 4700a316df7d2cdcd256dcd64a10cec643f4dfa1 (diff) | |
download | hqemu-ef3cb5ca82c341e575ee5cb9a9dd8edc6aa96b1b.zip hqemu-ef3cb5ca82c341e575ee5cb9a9dd8edc6aa96b1b.tar.gz |
Merge remote-tracking branch 'remotes/kvm/uq/master' into staging
* remotes/kvm/uq/master:
pc: port 92 reset requires a low->high transition
cpu: make CPU_INTERRUPT_RESET available on all targets
apic: do not accept SIPI on the bootstrap processor
target-i386: preserve FPU and MSR state on INIT
target-i386: fix set of registers zeroed on reset
kvm: forward INIT signals coming from the chipset
kvm: reset state from the CPU's reset method
target-i386: the x86 CPL is stored in CS.selector - auto update hflags accordingly.
target-i386: set eflags prior to calling cpu_x86_load_seg_cache() in seg_helper.c
target-i386: set eflags and cr0 prior to calling cpu_x86_load_seg_cache() in smm_helper.c
target-i386: set eflags prior to calling svm_load_seg_cache() in svm_helper.c
pci-assign: limit # of msix vectors
pci-assign: Fix a bug when map MSI-X table memory failed
kvm: make one_reg helpers available for everyone
target-i386: Remove unused data from local array
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-i386/cpu.c')
-rw-r--r-- | target-i386/cpu.c | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 8f193a9..042a48d 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -24,6 +24,7 @@ #include "cpu.h" #include "sysemu/kvm.h" #include "sysemu/cpus.h" +#include "kvm_i386.h" #include "topology.h" #include "qemu/option.h" @@ -2417,8 +2418,7 @@ static void x86_cpu_reset(CPUState *s) xcc->parent_reset(s); - - memset(env, 0, offsetof(CPUX86State, pat)); + memset(env, 0, offsetof(CPUX86State, cpuid_level)); tlb_flush(s, 1); @@ -2484,8 +2484,7 @@ static void x86_cpu_reset(CPUState *s) cpu_breakpoint_remove_all(s, BP_CPU); cpu_watchpoint_remove_all(s, BP_CPU); - env->tsc_adjust = 0; - env->tsc = 0; + env->xcr0 = 1; #if !defined(CONFIG_USER_ONLY) /* We hard-wire the BSP to the first CPU. */ @@ -2494,6 +2493,10 @@ static void x86_cpu_reset(CPUState *s) } s->halted = !cpu_is_bsp(cpu); + + if (kvm_enabled()) { + kvm_arch_reset_vcpu(cpu); + } #endif } |