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author | pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-03-11 13:03:18 +0000 |
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committer | pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-03-11 13:03:18 +0000 |
commit | f3d6b95e835ba12e9cfdca76124897122c47cd1b (patch) | |
tree | a2a4240c0e97229dee690c8fecde0b242593f949 /target-arm | |
parent | 5adb4839e3c35382832bedc7155b3317b7b7d560 (diff) | |
download | hqemu-f3d6b95e835ba12e9cfdca76124897122c47cd1b.zip hqemu-f3d6b95e835ba12e9cfdca76124897122c47cd1b.tar.gz |
ARM reabbot support (orginal patch by Aurelien Jarno).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2476 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-arm')
-rw-r--r-- | target-arm/cpu.h | 6 | ||||
-rw-r--r-- | target-arm/helper.c | 53 |
2 files changed, 37 insertions, 22 deletions
diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 891616e..68bf3fd 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -122,6 +122,12 @@ typedef struct CPUARMState { CPU_COMMON + /* These fields after the common ones so thes are preserved on reset. */ + int ram_size; + const char *kernel_filename; + const char *kernel_cmdline; + const char *initrd_filename; + int board_id; } CPUARMState; CPUARMState *cpu_arm_init(void); diff --git a/target-arm/helper.c b/target-arm/helper.c index 36f5fe0..242dd28 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -5,8 +5,37 @@ #include "cpu.h" #include "exec-all.h" +static inline void set_feature(CPUARMState *env, int feature) +{ + env->features |= 1u << feature; +} + +static void cpu_reset_model_id(CPUARMState *env, uint32_t id) +{ + env->cp15.c0_cpuid = id; + switch (id) { + case ARM_CPUID_ARM926: + set_feature(env, ARM_FEATURE_VFP); + env->vfp.xregs[ARM_VFP_FPSID] = 0x41011090; + break; + case ARM_CPUID_ARM1026: + set_feature(env, ARM_FEATURE_VFP); + set_feature(env, ARM_FEATURE_AUXCR); + env->vfp.xregs[ARM_VFP_FPSID] = 0x410110a0; + break; + default: + cpu_abort(env, "Bad CPU ID: %x\n", id); + break; + } +} + void cpu_reset(CPUARMState *env) { + uint32_t id; + id = env->cp15.c0_cpuid; + memset(env, 0, offsetof(CPUARMState, breakpoints)); + if (id) + cpu_reset_model_id(env, id); #if defined (CONFIG_USER_ONLY) env->uncached_cpsr = ARM_CPU_MODE_USR; env->vfp.xregs[ARM_VFP_FPEXC] = 1 << 30; @@ -16,6 +45,7 @@ void cpu_reset(CPUARMState *env) env->vfp.xregs[ARM_VFP_FPEXC] = 0; #endif env->regs[15] = 0; + tlb_flush(env, 1); } CPUARMState *cpu_arm_init(void) @@ -27,15 +57,9 @@ CPUARMState *cpu_arm_init(void) return NULL; cpu_exec_init(env); cpu_reset(env); - tlb_flush(env, 1); return env; } -static inline void set_feature(CPUARMState *env, int feature) -{ - env->features |= 1u << feature; -} - struct arm_cpu_t { uint32_t id; const char *name; @@ -74,22 +98,7 @@ void cpu_arm_set_model(CPUARMState *env, const char *name) cpu_abort(env, "Unknown CPU '%s'", name); return; } - - env->cp15.c0_cpuid = id; - switch (id) { - case ARM_CPUID_ARM926: - set_feature(env, ARM_FEATURE_VFP); - env->vfp.xregs[ARM_VFP_FPSID] = 0x41011090; - break; - case ARM_CPUID_ARM1026: - set_feature(env, ARM_FEATURE_VFP); - set_feature(env, ARM_FEATURE_AUXCR); - env->vfp.xregs[ARM_VFP_FPSID] = 0x410110a0; - break; - default: - cpu_abort(env, "Bad CPU ID: %x\n", id); - break; - } + cpu_reset_model_id(env, id); } void cpu_arm_close(CPUARMState *env) |