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authorpbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162>2006-02-04 21:50:36 +0000
committerpbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162>2006-02-04 21:50:36 +0000
commit191abaa2f0aca0c6ebca06f3e985da02ac950d14 (patch)
tree3daf2f8918ef1d5452eccc92af16e1984d737d0f /target-arm
parent3442e8964e7ed6a79cf22e82232e4341a1805d82 (diff)
downloadhqemu-191abaa2f0aca0c6ebca06f3e985da02ac950d14.zip
hqemu-191abaa2f0aca0c6ebca06f3e985da02ac950d14.tar.gz
Fix Arm interrupted ldm bug.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1743 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-arm')
-rw-r--r--target-arm/op.c10
-rw-r--r--target-arm/translate.c10
2 files changed, 19 insertions, 1 deletions
diff --git a/target-arm/op.c b/target-arm/op.c
index acac239..f06b06b 100644
--- a/target-arm/op.c
+++ b/target-arm/op.c
@@ -1181,3 +1181,13 @@ void OPPROTO op_movl_user_T0(void)
}
FORCE_RET();
}
+
+void OPPROTO op_movl_T2_T0(void)
+{
+ T2 = T0;
+}
+
+void OPPROTO op_movl_T0_T2(void)
+{
+ T0 = T2;
+}
diff --git a/target-arm/translate.c b/target-arm/translate.c
index 5f81708..d5cbc5e 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -1627,7 +1627,7 @@ static void disas_arm_insn(CPUState * env, DisasContext *s)
case 0x08:
case 0x09:
{
- int j, n, user;
+ int j, n, user, loaded_base;
/* load/store multiple words */
/* XXX: store correct base if write back */
user = 0;
@@ -1642,6 +1642,7 @@ static void disas_arm_insn(CPUState * env, DisasContext *s)
gen_movl_T1_reg(s, rn);
/* compute total size */
+ loaded_base = 0;
n = 0;
for(i=0;i<16;i++) {
if (insn & (1 << i))
@@ -1675,6 +1676,9 @@ static void disas_arm_insn(CPUState * env, DisasContext *s)
gen_bx(s);
} else if (user) {
gen_op_movl_user_T0(i);
+ } else if (i == rn) {
+ gen_op_movl_T2_T0();
+ loaded_base = 1;
} else {
gen_movl_reg_T0(s, i);
}
@@ -1718,6 +1722,10 @@ static void disas_arm_insn(CPUState * env, DisasContext *s)
}
gen_movl_reg_T1(s, rn);
}
+ if (loaded_base) {
+ gen_op_movl_T0_T2();
+ gen_movl_reg_T0(s, rn);
+ }
if ((insn & (1 << 22)) && !user) {
/* Restore CPSR from SPSR. */
gen_op_movl_T0_spsr();
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