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authorRichard Henderson <rth@twiddle.net>2015-09-14 14:39:47 +0100
committerPeter Maydell <peter.maydell@linaro.org>2015-09-14 14:39:47 +0100
commit6c2c63d3a02c79e9035ca0370cc549d0f938a4dd (patch)
treebf0c399acd5825ea9a92ea9a1a265668765e9770 /target-arm/translate.h
parent78bcaa3e37afbd0c5316634f917c13487384b6ca (diff)
downloadhqemu-6c2c63d3a02c79e9035ca0370cc549d0f938a4dd.zip
hqemu-6c2c63d3a02c79e9035ca0370cc549d0f938a4dd.tar.gz
target-arm: Introduce DisasCompare
Split arm_gen_test_cc into 3 functions, so that it can be reused for non-branch TCG comparisons. Signed-off-by: Richard Henderson <rth@twiddle.net> Message-id: 1441909103-24666-3-git-send-email-rth@twiddle.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/translate.h')
-rw-r--r--target-arm/translate.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/target-arm/translate.h b/target-arm/translate.h
index a30a1db..b8fe37a 100644
--- a/target-arm/translate.h
+++ b/target-arm/translate.h
@@ -63,6 +63,12 @@ typedef struct DisasContext {
TCGv_i64 tmp_a64[TMP_A64_MAX];
} DisasContext;
+typedef struct DisasCompare {
+ TCGCond cond;
+ TCGv_i32 value;
+ bool value_global;
+} DisasCompare;
+
/* Share the TCG temporaries common between 32 and 64 bit modes. */
extern TCGv_ptr cpu_env;
extern TCGv_i32 cpu_NF, cpu_ZF, cpu_CF, cpu_VF;
@@ -144,6 +150,9 @@ static inline void aarch64_cpu_dump_state(CPUState *cs, FILE *f,
}
#endif
+void arm_test_cc(DisasCompare *cmp, int cc);
+void arm_free_cc(DisasCompare *cmp);
+void arm_jump_cc(DisasCompare *cmp, TCGLabel *label);
void arm_gen_test_cc(int cc, TCGLabel *label);
#endif /* TARGET_ARM_TRANSLATE_H */
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