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author | Peter Maydell <peter.maydell@linaro.org> | 2013-12-17 19:42:31 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2013-12-17 19:42:31 +0000 |
commit | 40f860cd6c1aa0d3399e3f8158f20bdc5b2bfbfe (patch) | |
tree | 3a1f548e37e35bb9a329fdc37452b39fe932027b /target-arm/translate.h | |
parent | 013424d436b83f7ba8366b1d40bf82c4f6716f5e (diff) | |
download | hqemu-40f860cd6c1aa0d3399e3f8158f20bdc5b2bfbfe.zip hqemu-40f860cd6c1aa0d3399e3f8158f20bdc5b2bfbfe.tar.gz |
target-arm: Split A64 from A32/T32 gen_intermediate_code_internal()
The A32/T32 gen_intermediate_code_internal() is complicated because it
has to deal with:
* conditionally executed instructions
* Thumb IT blocks
* kernel helper page
* M profile exception-exit special casing
None of these apply to A64, so putting the "this is A64 so
call the A64 decoder" check in the middle of the A32/T32
loop is confusing and means the A64 decoder's handling of
things like conditional jump and singlestepping has to take
account of the conditional-execution jumps the main loop
might emit.
Refactor the code to give A64 its own gen_intermediate_code_internal
function instead.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-arm/translate.h')
-rw-r--r-- | target-arm/translate.h | 20 |
1 files changed, 18 insertions, 2 deletions
diff --git a/target-arm/translate.h b/target-arm/translate.h index 67c7760..8789181 100644 --- a/target-arm/translate.h +++ b/target-arm/translate.h @@ -28,16 +28,32 @@ typedef struct DisasContext { extern TCGv_ptr cpu_env; +/* target-specific extra values for is_jmp */ +/* These instructions trap after executing, so the A32/T32 decoder must + * defer them until after the conditional execution state has been updated. + * WFI also needs special handling when single-stepping. + */ +#define DISAS_WFI 4 +#define DISAS_SWI 5 +/* For instructions which unconditionally cause an exception we can skip + * emitting unreachable code at the end of the TB in the A64 decoder + */ +#define DISAS_EXC 6 + #ifdef TARGET_AARCH64 void a64_translate_init(void); -void disas_a64_insn(CPUARMState *env, DisasContext *s); +void gen_intermediate_code_internal_a64(ARMCPU *cpu, + TranslationBlock *tb, + bool search_pc); void gen_a64_set_pc_im(uint64_t val); #else static inline void a64_translate_init(void) { } -static inline void disas_a64_insn(CPUARMState *env, DisasContext *s) +static inline void gen_intermediate_code_internal_a64(ARMCPU *cpu, + TranslationBlock *tb, + bool search_pc) { } |