diff options
author | Fabian Aggeler <aggelerf@ethz.ch> | 2014-12-11 12:07:51 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2014-12-11 12:07:51 +0000 |
commit | 11f136ee25232a00f433cefe98ee33cd614ecccc (patch) | |
tree | 599ca593ddc08113870f00d887984d3142529139 /target-arm/internals.h | |
parent | 7dd8c9af0d9d18fb3e54a4843b3bb1398bd330bc (diff) | |
download | hqemu-11f136ee25232a00f433cefe98ee33cd614ecccc.zip hqemu-11f136ee25232a00f433cefe98ee33cd614ecccc.tar.gz |
target-arm: make TTBCR banked
Adds secure and non-secure bank register suport for TTBCR.
Added new struct to compartmentalize the TCR data and masks. Removed old
tcr/ttbcr data and added a 4 element array of the new structs in cp15. This
allows for one entry per EL. Added a CP register definition for TCR_EL3.
Signed-off-by: Fabian Aggeler <aggelerf@ethz.ch>
Signed-off-by: Greg Bellows <greg.bellows@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1416242878-876-18-git-send-email-greg.bellows@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/internals.h')
-rw-r--r-- | target-arm/internals.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/target-arm/internals.h b/target-arm/internals.h index 2dff4ff..bb171a7 100644 --- a/target-arm/internals.h +++ b/target-arm/internals.h @@ -153,9 +153,9 @@ static inline void update_spsel(CPUARMState *env, uint32_t imm) */ static inline bool extended_addresses_enabled(CPUARMState *env) { - return arm_el_is_aa64(env, 1) - || ((arm_feature(env, ARM_FEATURE_LPAE) - && (env->cp15.c2_control & TTBCR_EAE))); + TCR *tcr = &env->cp15.tcr_el[arm_is_secure(env) ? 3 : 1]; + return arm_el_is_aa64(env, 1) || + (arm_feature(env, ARM_FEATURE_LPAE) && (tcr->raw_tcr & TTBCR_EAE)); } /* Valid Syndrome Register EC field values */ |