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author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2015-08-17 17:34:10 +1000 |
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committer | Richard Henderson <rth@twiddle.net> | 2015-09-11 08:15:28 -0700 |
commit | 97ed5ccdee95f0b98bedc601ff979e368583472c (patch) | |
tree | 5ee711528010f3700f13983b8222c2ca7ae85c83 /target-arm/helper.c | |
parent | ba9cef7b6e487a5a8969db81d09b8eec8a2b50c6 (diff) | |
download | hqemu-97ed5ccdee95f0b98bedc601ff979e368583472c.zip hqemu-97ed5ccdee95f0b98bedc601ff979e368583472c.tar.gz |
tlb: Add "ifetch" argument to cpu_mmu_index()
This is set to true when the index is for an instruction fetch
translation.
The core get_page_addr_code() sets it, as do the SOFTMMU_CODE_ACCESS
acessors.
All targets ignore it for now, and all other callers pass "false".
This will allow targets who wish to split the mmu index between
instruction and data accesses to do so. A subsequent patch will
do just that for PowerPC.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Message-Id: <1439796853-4410-2-git-send-email-benh@kernel.crashing.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-arm/helper.c')
-rw-r--r-- | target-arm/helper.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c index d453120..2c6ec9d 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -6892,7 +6892,7 @@ hwaddr arm_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) uint32_t fsr; MemTxAttrs attrs = {}; - ret = get_phys_addr(env, addr, 0, cpu_mmu_index(env), &phys_addr, + ret = get_phys_addr(env, addr, 0, cpu_mmu_index(env, false), &phys_addr, &attrs, &prot, &page_size, &fsr); if (ret) { @@ -7057,7 +7057,7 @@ void HELPER(dc_zva)(CPUARMState *env, uint64_t vaddr_in) int maxidx = DIV_ROUND_UP(blocklen, TARGET_PAGE_SIZE); void *hostaddr[maxidx]; int try, i; - unsigned mmu_idx = cpu_mmu_index(env); + unsigned mmu_idx = cpu_mmu_index(env, false); TCGMemOpIdx oi = make_memop_idx(MO_UB, mmu_idx); for (try = 0; try < 2; try++) { |