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author | Andreas Färber <afaerber@suse.de> | 2013-07-07 12:32:15 +0200 |
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committer | Andreas Färber <afaerber@suse.de> | 2013-07-26 23:24:01 +0200 |
commit | 58850dad68f3458cf430395db2e016f1d03ad7de (patch) | |
tree | 77482a23d12e2cee0280642d2ce13fa2e976ebea /target-arm/gdbstub.c | |
parent | d19c87f44d8d7bac48d4b35863ae825f872ed54a (diff) | |
download | hqemu-58850dad68f3458cf430395db2e016f1d03ad7de.zip hqemu-58850dad68f3458cf430395db2e016f1d03ad7de.tar.gz |
target-arm: Move cpu_gdb_{read,write}_register()
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-arm/gdbstub.c')
-rw-r--r-- | target-arm/gdbstub.c | 94 |
1 files changed, 94 insertions, 0 deletions
diff --git a/target-arm/gdbstub.c b/target-arm/gdbstub.c new file mode 100644 index 0000000..74903a3 --- /dev/null +++ b/target-arm/gdbstub.c @@ -0,0 +1,94 @@ +/* + * ARM gdb server stub + * + * Copyright (c) 2003-2005 Fabrice Bellard + * Copyright (c) 2013 SUSE LINUX Products GmbH + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see <http://www.gnu.org/licenses/>. + */ + +/* Old gdb always expect FPA registers. Newer (xml-aware) gdb only expect + whatever the target description contains. Due to a historical mishap + the FPA registers appear in between core integer regs and the CPSR. + We hack round this by giving the FPA regs zero size when talking to a + newer gdb. */ + +static int cpu_gdb_read_register(CPUARMState *env, uint8_t *mem_buf, int n) +{ + if (n < 16) { + /* Core integer register. */ + GET_REG32(env->regs[n]); + } + if (n < 24) { + /* FPA registers. */ + if (gdb_has_xml) { + return 0; + } + memset(mem_buf, 0, 12); + return 12; + } + switch (n) { + case 24: + /* FPA status register. */ + if (gdb_has_xml) { + return 0; + } + GET_REG32(0); + case 25: + /* CPSR */ + GET_REG32(cpsr_read(env)); + } + /* Unknown register. */ + return 0; +} + +static int cpu_gdb_write_register(CPUARMState *env, uint8_t *mem_buf, int n) +{ + uint32_t tmp; + + tmp = ldl_p(mem_buf); + + /* Mask out low bit of PC to workaround gdb bugs. This will probably + cause problems if we ever implement the Jazelle DBX extensions. */ + if (n == 15) { + tmp &= ~1; + } + + if (n < 16) { + /* Core integer register. */ + env->regs[n] = tmp; + return 4; + } + if (n < 24) { /* 16-23 */ + /* FPA registers (ignored). */ + if (gdb_has_xml) { + return 0; + } + return 12; + } + switch (n) { + case 24: + /* FPA status register (ignored). */ + if (gdb_has_xml) { + return 0; + } + return 4; + case 25: + /* CPSR */ + cpsr_write(env, tmp, 0xffffffff); + return 4; + } + /* Unknown register. */ + return 0; +} |