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author | Peter Maydell <peter.maydell@linaro.org> | 2013-09-03 20:12:07 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2013-09-10 19:11:28 +0100 |
commit | d14d42f19bf3dcef5c81ec2324843121f552a6fc (patch) | |
tree | e0a1cfeb24dfe19a2405baf15b07ec3857bfc832 /target-arm/cpu64.c | |
parent | eaed129deaea393640cf6bff006cd5cec3b38d8f (diff) | |
download | hqemu-d14d42f19bf3dcef5c81ec2324843121f552a6fc.zip hqemu-d14d42f19bf3dcef5c81ec2324843121f552a6fc.tar.gz |
target-arm: Add new AArch64CPUInfo base class and subclasses
Create a new AArch64CPU class; all 64-bit capable ARM
CPUs are subclasses of this. (Currently we only support
one, the "any" CPU used by linux-user.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1378235544-22290-8-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'target-arm/cpu64.c')
-rw-r--r-- | target-arm/cpu64.c | 111 |
1 files changed, 111 insertions, 0 deletions
diff --git a/target-arm/cpu64.c b/target-arm/cpu64.c new file mode 100644 index 0000000..faee0f0 --- /dev/null +++ b/target-arm/cpu64.c @@ -0,0 +1,111 @@ +/* + * QEMU AArch64 CPU + * + * Copyright (c) 2013 Linaro Ltd + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see + * <http://www.gnu.org/licenses/gpl-2.0.html> + */ + +#include "cpu.h" +#include "qemu-common.h" +#if !defined(CONFIG_USER_ONLY) +#include "hw/loader.h" +#endif +#include "hw/arm/arm.h" +#include "sysemu/sysemu.h" +#include "sysemu/kvm.h" + +static inline void set_feature(CPUARMState *env, int feature) +{ + env->features |= 1ULL << feature; +} + +#ifdef CONFIG_USER_ONLY +static void aarch64_any_initfn(Object *obj) +{ + ARMCPU *cpu = ARM_CPU(obj); + + set_feature(&cpu->env, ARM_FEATURE_V8); + set_feature(&cpu->env, ARM_FEATURE_VFP4); + set_feature(&cpu->env, ARM_FEATURE_VFP_FP16); + set_feature(&cpu->env, ARM_FEATURE_NEON); + set_feature(&cpu->env, ARM_FEATURE_THUMB2EE); + set_feature(&cpu->env, ARM_FEATURE_ARM_DIV); + set_feature(&cpu->env, ARM_FEATURE_V7MP); + set_feature(&cpu->env, ARM_FEATURE_AARCH64); +} +#endif + +typedef struct ARMCPUInfo { + const char *name; + void (*initfn)(Object *obj); + void (*class_init)(ObjectClass *oc, void *data); +} ARMCPUInfo; + +static const ARMCPUInfo aarch64_cpus[] = { +#ifdef CONFIG_USER_ONLY + { .name = "any", .initfn = aarch64_any_initfn }, +#endif +}; + +static void aarch64_cpu_initfn(Object *obj) +{ +} + +static void aarch64_cpu_finalizefn(Object *obj) +{ +} + +static void aarch64_cpu_class_init(ObjectClass *oc, void *data) +{ +} + +static void aarch64_cpu_register(const ARMCPUInfo *info) +{ + TypeInfo type_info = { + .parent = TYPE_AARCH64_CPU, + .instance_size = sizeof(ARMCPU), + .instance_init = info->initfn, + .class_size = sizeof(ARMCPUClass), + .class_init = info->class_init, + }; + + type_info.name = g_strdup_printf("%s-" TYPE_ARM_CPU, info->name); + type_register(&type_info); + g_free((void *)type_info.name); +} + +static const TypeInfo aarch64_cpu_type_info = { + .name = TYPE_AARCH64_CPU, + .parent = TYPE_ARM_CPU, + .instance_size = sizeof(ARMCPU), + .instance_init = aarch64_cpu_initfn, + .instance_finalize = aarch64_cpu_finalizefn, + .abstract = true, + .class_size = sizeof(AArch64CPUClass), + .class_init = aarch64_cpu_class_init, +}; + +static void aarch64_cpu_register_types(void) +{ + int i; + + type_register_static(&aarch64_cpu_type_info); + for (i = 0; i < ARRAY_SIZE(aarch64_cpus); i++) { + aarch64_cpu_register(&aarch64_cpus[i]); + } +} + +type_init(aarch64_cpu_register_types) |