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| author | Timothy Pearson <tpearson@raptorengineering.com> | 2019-05-11 15:12:49 -0500 |
|---|---|---|
| committer | Timothy Pearson <tpearson@raptorengineering.com> | 2019-05-11 15:12:49 -0500 |
| commit | 9e80202352dd49bdd9e67b8b906d86f058431505 (patch) | |
| tree | 5673c17aad6e3833da8c4ff21b5a11f666ec9fbe /src/roms/u-boot/include/sja1000.h | |
| download | hqemu-master.zip hqemu-master.tar.gz | |
Diffstat (limited to 'src/roms/u-boot/include/sja1000.h')
| -rw-r--r-- | src/roms/u-boot/include/sja1000.h | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/src/roms/u-boot/include/sja1000.h b/src/roms/u-boot/include/sja1000.h new file mode 100644 index 0000000..07cd9e3 --- /dev/null +++ b/src/roms/u-boot/include/sja1000.h @@ -0,0 +1,44 @@ +/* + * Copyright 2009, Matthias Fuchs <matthias.fuchs@esd.eu> + * + * SJA1000 register layout for basic CAN mode + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _SJA1000_H_ +#define _SJA1000_H_ + +/* + * SJA1000 register layout in basic can mode + */ +struct sja1000_basic_s { + u8 cr; + u8 cmr; + u8 sr; + u8 ir; + u8 ac; + u8 am; + u8 btr0; + u8 btr1; + u8 oc; + u8 txb[10]; + u8 rxb[10]; + u8 unused; + u8 cdr; +}; + +/* control register */ +#define CR_RR 0x01 + +/* output control register */ +#define OC_MODE0 0x01 +#define OC_MODE1 0x02 +#define OC_POL0 0x04 +#define OC_TN0 0x08 +#define OC_TP0 0x10 +#define OC_POL1 0x20 +#define OC_TN1 0x40 +#define OC_TP1 0x80 + +#endif |
