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author | Timothy Pearson <tpearson@raptorengineering.com> | 2019-05-11 15:12:49 -0500 |
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committer | Timothy Pearson <tpearson@raptorengineering.com> | 2019-05-11 15:12:49 -0500 |
commit | 9e80202352dd49bdd9e67b8b906d86f058431505 (patch) | |
tree | 5673c17aad6e3833da8c4ff21b5a11f666ec9fbe /src/roms/openbios/include/arch/sparc32/crs.h | |
download | hqemu-master.zip hqemu-master.tar.gz |
Diffstat (limited to 'src/roms/openbios/include/arch/sparc32/crs.h')
-rw-r--r-- | src/roms/openbios/include/arch/sparc32/crs.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/src/roms/openbios/include/arch/sparc32/crs.h b/src/roms/openbios/include/arch/sparc32/crs.h new file mode 100644 index 0000000..7b45593 --- /dev/null +++ b/src/roms/openbios/include/arch/sparc32/crs.h @@ -0,0 +1,14 @@ +/* + * Parts of asm-sparc/contregs.h + * + * contregs.h: Addresses of registers in the ASI_CONTROL alternate address + * space. These are for the mmu's context register, etc. + * + * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) + */ +/* s=Swift, h=Ross_HyperSPARC, v=TI_Viking, t=Tsunami, r=Ross_Cypress */ +#define AC_M_PCR 0x0000 /* shv Processor Control Reg */ +#define AC_M_CTPR 0x0100 /* shv Context Table Pointer Reg */ +#define AC_M_CXR 0x0200 /* shv Context Register */ +#define AC_M_SFSR 0x0300 /* shv Synchronous Fault Status Reg */ +#define AC_M_SFAR 0x0400 /* shv Synchronous Fault Address Reg */ |