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| author | Timothy Pearson <tpearson@raptorengineering.com> | 2019-05-11 15:12:49 -0500 |
|---|---|---|
| committer | Timothy Pearson <tpearson@raptorengineering.com> | 2019-05-11 15:12:49 -0500 |
| commit | 9e80202352dd49bdd9e67b8b906d86f058431505 (patch) | |
| tree | 5673c17aad6e3833da8c4ff21b5a11f666ec9fbe /src/roms/SLOF/include/ppcp7/cpu.h | |
| download | hqemu-master.zip hqemu-master.tar.gz | |
Diffstat (limited to 'src/roms/SLOF/include/ppcp7/cpu.h')
| -rw-r--r-- | src/roms/SLOF/include/ppcp7/cpu.h | 66 |
1 files changed, 66 insertions, 0 deletions
diff --git a/src/roms/SLOF/include/ppcp7/cpu.h b/src/roms/SLOF/include/ppcp7/cpu.h new file mode 100644 index 0000000..1b1fadd --- /dev/null +++ b/src/roms/SLOF/include/ppcp7/cpu.h @@ -0,0 +1,66 @@ +/****************************************************************************** + * Copyright (c) 2004, 2008 IBM Corporation + * All rights reserved. + * This program and the accompanying materials + * are made available under the terms of the BSD License + * which accompanies this distribution, and is available at + * http://www.opensource.org/licenses/bsd-license.php + * + * Contributors: + * IBM Corporation - initial implementation + *****************************************************************************/ + +#ifndef __CPU_H +#define __CPU_H + +/* Used in boot_abort.S, will need something better for KVM */ +#define HSPRG0 304 + +/* XXX FIXME: Can be more efficient, no dcbst nor loop needed on P7 */ +/* This macro uses r0 */ +#define FLUSH_CACHE(r, n) add n, n, r; \ + addi n, n, 127; \ + rlwinm r, r, 0,0,24; \ + rlwinm n, n, 0,0,24; \ + sub n, n, r; \ + srwi n, n, 7; \ + mtctr n; \ + 0: dcbst 0, r; \ + sync; \ + icbi 0, r; \ + sync; \ + isync; \ + addi r, r, 128; \ + bdnz 0b; + +#ifndef __ASSEMBLER__ +#define STRINGIFY(x...) #x +#define EXPAND(x) STRINGIFY(x) + +static inline void flush_cache(void* r, long n) +{ + asm volatile(EXPAND(FLUSH_CACHE(%0, %1)) + : "+r"(r), "+r"(n) + :: "memory", "cc", "r0", "ctr"); +} + +static inline void eieio(void) +{ + asm volatile ("eieio":::"memory"); +} + +static inline void barrier(void) +{ + asm volatile("" : : : "memory"); +} +#define cpu_relax() barrier() + +static inline void sync(void) +{ + asm volatile ("sync" ::: "memory"); +} +#define mb() sync() + +#endif /* __ASSEMBLER__ */ + +#endif |
